HMC546LP2E Data Sheet
Rev. E | Page 6 of 13
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
6
5
1
2
3
4
Tx
V
CTL
ACG
RFC
V
DD
Rx
HMC546LP2E
TOP VIEW
(Not to Scale)
NOTES
1. EXPOSED PAD. THE PACKAGE BOTTOM
HAS AN EXPOSED METAL PADDLE THAT
MUST BE CONNECTED TO THE PRINTED
CIRCUIT BOARD (PCB) RF GROUND.
13975-002
Figure 2. Pin Configuration
Table 3. Pin Function Descriptions
Pin No. Mnemonic Description
1 Tx Radio Frequency (RF) Transmit. This pin is dc- coupled and not well matched to 50 Ω. External matching
components and a dc blocking capacitor are required.
2 V
CTL
Control Voltage Input. For more information about the V
CTL
pin, see Table 4 and Figure 3.
3 ACG AC Ground. An external capacitor from ACG to ground is required.
4 Rx RF Receive. This pin is dc-coupled and not well matched to 50 Ω. External matching components and a
dc blocking capacitor are required.
5 V
DD
Supply Voltage. See Figure 4 for the interface schematic.
6 RFC RF Common. This pin is dc-coupled and not well matched to 50 Ω. External matching components and a
dc blocking capacitor are required.
Exposed Pad. The package bottom has an exposed metal paddle that must be connected to the printed
circuit board (PCB) RF ground.
Table 4. Truth Table
Control Input
1
Signal Path State
V
CTL
V
DD
RFC to Tx RFC to Rx
0 V V
DD
Off On
V
DD
V
DD
On Off
0 V 0 V On Off
High-Z High-Z On Off
1
V
DD
= 3 V to 8 V, and control input voltage tolerances are ±0.2 V dc.
INTERFACE SCHEMATICS
Figure 3. V
CTL
Interface
Figure 4. V
DD
Interface
