LTC1751EMS8-3.3#PBF

4
LTC1751/LTC1751-3.3/LTC1751-5
TYPICAL PERFOR A CE CHARACTERISTICS
UW
Power Efficiency vs Load Current
Short-Circuit Output Current
vs Input Voltage
LOAD CURRENT (mA)
0.001
40
EFFICIENCY (%)
50
60
70
80
0.01 0.1 1 10 100
1751 G04
30
20
10
0
90
100
V
IN
= 2.75V
V
IN
= 2V
V
IN
= 4.4V
V
IN
= 3.3V
T
A
= 25°C
C
FLY
= 1µF
C
OUT
= 10µF
INPUT VOLTAGE (V)
2.0
OUTPUT CURRENT (mA)
150
200
4.0
1751 G05
100
50
2.5
3.0
3.5
4.5
250
T
A
= 25°C
C
FLY
= 1µF
Start-Up
C
SS
= 10nF 2ms/DIV 1751 G06
SHDN
2V/DIV
PGOOD
5V/DIV
V
OUT
1V/DIV
Output Ripple
V
IN
= 2.5V 5µs/DIV 1751 G07
I
OUT
= 80mA
C
OUT
= 10µF
V
OUT
AC COUPLED
50mV/DIV
Load Transient Response
V
IN
= 2.5V 50µs/DIV 1751 G08
V
OUT
AC COUPLED
50mV/DIV
I
OUT
40mA/DIV
(LTC1751-3.3)
(LTC1751-5)
OUTPUT CURRENT (mA)
0
OUTPUT VOLTAGE (V)
5.0
5.1
200
1751 G09
4.9
4.8
50
100
150
V
IN
= 3V
5.2
T
A
= 25°C
C
FLY
= 1µF
V
IN
= 2.7V
Output Voltage vs Output Current
No Load Supply Current
vs Input Voltage
INPUT VOLTAGE (V)
2.5
0
SUPPLY CURRENT (µA)
10
20
30
40
3.0 3.5 4.0 4.5
1751 G10
5.0 5.5
C
FLY
= 1µF
I
OUT
= 0
V
SHDN
= V
IN
T
A
= 85°C
T
A
= 25°C
T
A
= –40°C
5
LTC1751/LTC1751-3.3/LTC1751-5
UU
U
PI FU CTIO S
PGOOD (Pin 1) (LTC1751-3.3/LTC1751-5): Output Volt-
age Status Indicator. On start-up, this open-drain pin re-
mains low until the output voltage, V
OUT
, is within 4.5%
(typ) of its final value. Once V
OUT
is valid, PGOOD becomes
high-Z. If, due to a fault condition, V
OUT
falls 7% (typ) below
its correct regulation level, PGOOD pulls low. PGOOD may
be pulled up through an external resistor to any appropri-
ate reference level.
FB (Pin 1) (LTC1751): The voltage on this pin is compared
to the internal reference voltage (1.205V) by the error
comparator to keep the output in regulation. An external
resistor divider is required between V
OUT
and FB to pro-
gram the output voltage.
V
OUT
(Pin 2): Regulated Output Voltage. For best perfor-
mance, V
OUT
should be bypassed with a 6.8µF (min) low
ESR capacitor as close to the pin as possible .
V
IN
(Pin 3): Input Supply Voltage. V
IN
should be bypassed
with a 6.8µF (min) low ESR capacitor.
GND (Pin 4): Ground. Should be tied to a ground plane for
best performance.
C
(Pin 5): Flying Capacitor Negative Terminal.
C
+
(PIN 6): Flying Capacitor Positive Terminal.
SHDN (Pin 7): Active Low Shutdown Input. A low on
SHDN disables the device. SHDN must not be allowed to
float.
SS (Pin 8): Soft-Start Programming Pin. A capacitor on SS
programs the start-up time of the charge pump so that
large start-up input current is eliminated.
TYPICAL PERFOR A CE CHARACTERISTICS
UW
Power Efficiency vs Load Current
Short-Circuit Output Current
vs Input Voltage
Start-Up
C
SS
= 10nF 2ms/DIV 1751 G13
SHDN
2V/DIV
PGOOD
5V/DIV
V
OUT
2V/DIV
Output Ripple
V
IN
= 3V 5µs/DIV 1751 G14
I
OUT
= 100mA
C
OUT
= 10µF
V
OUT
AC COUPLED
50mV/DIV
Load Transient Response
V
IN
= 3V 50µs/DIV 1751 G15
V
OUT
AC COUPLED
50mV/DIV
I
OUT
50mA/DIV
(LTC1751-5)
LOAD CURRENT (mA)
0.001
40
EFFICIENCY (%)
50
60
70
80
0.01 0.1 1 10 100
1751 G11
30
20
10
0
90
100
V
IN
= 2.7V
V
IN
= 4.1V
V
IN
= 5.5V
T
A
= 25°C
C
FLY
= 1µF
C
OUT
= 10µF
INPUT VOLTAGE (V)
2.0
50
OUTPUT CURRENT (mA)
100
150
200
250
2.5 3.0 3.5 4.0
1751 G12
4.5 5.0 5.5
T
A
= 25°C
C
FLY
= 1µF
6
LTC1751/LTC1751-3.3/LTC1751-5
LTC1751
+
V
REF
FB
V
OUT
V
IN
GND
2µA
SS
SHDN
C
+
C
1751 BD2
COMP1
CHARGE PUMP
CONTROL
2 7
1
8
6
3
5
4
SI PLIFIED
W
BLOCK DIAGRA S
W
+
+
+
+
V
REF
PGOOD
V
OUT
V
IN
GND
2µA
SS
SHDN
C
+
C
1751 BD1
READY
UNDERV
COMP1
CHARGE PUMP
CONTROL
+
2 7
1
8
6
3
5
4
LTC1751-3.3/LTC1751-5

LTC1751EMS8-3.3#PBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Switching Voltage Regulators Reg 3.3V Charge Pump at 100mA
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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