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581G-01ILFT

P1-P3P4-P6P7-P9P10-P10
ICS581-01/02
ZERO DELAY GLITCH-FREE CLOCK MULTIPLEXER ZDB AND MULTIPLEXER
IDT™ / ICS™
ZERO DELAY GLITCH-FREE CLOCK MULTIPLEXER 4
ICS581-01/02 REV L 051310
PLL will run in an open loop.
The ICS581-02 is identical to the ICS581-01 except for the
switching of the input mux. On the ICS581-02, the switching
is automatically controlled by a transition detector. The
transition detector monitors the clock on INA. If this clock
stops, the output of the detector, NO_INA goes high, which
then selects clock input INB to the mux. The definition of the
clock stopping is determined by a timeout selected by input
DIV. If DIV is low, NO_INA will go high after no transitions
have occurred on INA for nominally three cycles of the clock
on INB. If DIV is high, the timeout is nominally 48 cycles of
INB. When INA restarts, the mux immediately switches back
to the INA selection with no timeout.
Input Clock Frequency
The ICS581-01 and ICS581-02 are designed to switch
between two clocks of the same frequency. They will also
operate with different frequencies on each of the two input
clocks. If the two input frequencies require different input
ranges (see table on page two), then the highest range
should be permanently selected. When the selected input
clock is outside this range, jitter and input skew
specifications may not be met. Consult IDT for more
information.
Application Example
A typical application for the ICS581-02 is to provide a backup clock for a system. The backup reliable clock would
be connected to INB while the main clock would be connected to INA. If the main clock failed, the ICS581-02 would
automatically be switched to the backup clock. The following example shows the connection for this.
In this example, the clocks are 155 MHz and so the frequency range is address 11. Both S0 and S1 are left
unconnected, causing the on-chip pull-ups to produce the required high inputs. The same is true for OE0, OE1, and
DIV. In this example, CLK4 is used as the feedback. Note that the feedback path is before the series resistor.
CLK3
S0
CLK4
S1
GND
VDD
OE1
INA
INB
GND
FBIN
OE0
DIV
VDD
CLK1
CLK2
VDD
0.01 F
33
33
33
33
0.01 F
MAIN
BACKUP
ICS581-01/02
ZERO DELAY GLITCH-FREE CLOCK MULTIPLEXER ZDB AND MULTIPLEXER
IDT™ / ICS™
ZERO DELAY GLITCH-FREE CLOCK MULTIPLEXER 5
ICS581-01/02 REV L 051310
External Components
The ICS581-01 and ICS581-02 require two 0.01µF capacitors between VDD and GND, one on each side of the
chip. These must be close to the chip to minimize lead inductance. Series termination resistors of 33Ω should be
used on the outputs, should also be close to the chip, and the feedback path should be a direct connection from a
clock output to a FBIN pin, routed directly under the chip to minimize trace length. This should be connected before
the series termination resistor.
Absolute Maximum Ratings
Stresses above the ratings listed below can cause permanent damage to the ICS581-01/02. These ratings, which
are standard values for IDT commercially rated parts, are stress ratings only. Functional operation of the device at
these or any other conditions above those indicated in the operational sections of the specifications is not implied.
Exposure to absolute maximum rating conditions for extended periods can affect product reliability. Electrical
parameters are guaranteed only over the recommended operating temperature range.
Recommended Operation Conditions
DC Electrical Characteristics
Unless stated otherwise, VDD = 3.3 V ±5%, Ambient Temperature -40 to +85° C
Item Rating
Supply Voltage, VDD 7 V
All Inputs and Outputs -0.5 V to VDD+0.5 V
Ambient Operating Temperature (ICS581-01, ICS581-02) 0 to +70° C
Ambient Operating Temperature (ICS581-01I, ICS581-02I) -40 to +85° C
Storage Temperature -65 to +150° C
Junction Temperature 125° C
Soldering Temperature 260° C
Parameter Min. Typ. Max. Units
Ambient Operating Temperature (ICS581-01, ICS581-02) 0 +70 ° C
Ambient Operating Temperature (ICS581-01I, ICS581-02I) -40 +85 ° C
Power Supply Voltage (measured in respect to GND) +3.0 +5.5 V
Parameter Symbol Conditions Min. Typ. Max. Units
Operating Voltage VDD 3.0 5.5 V
Supply Current IDD 100 MHz, no load 26 mA
Input High Voltage V
IH
Non-clock inputs 2 V
Input Low Voltage V
IL
Non-clock inputs 0.8 V
Input High Voltage V
IH
INA, INB, FBIN (VDD/2)+1 VDD/2 V
Input Low Voltage V
IL
INA, INB, FBIN VDD/2 (VDD/2)-1 V
ICS581-01/02
ZERO DELAY GLITCH-FREE CLOCK MULTIPLEXER ZDB AND MULTIPLEXER
IDT™ / ICS™
ZERO DELAY GLITCH-FREE CLOCK MULTIPLEXER 6
ICS581-01/02 REV L 051310
AC Electrical Characteristics
Unless stated otherwise, VDD = 3.3 V ±5%, Ambient Temperature -40 to +85° C
Note 1: Assumes clocks with same rise times, measured at VDD/2.
Note 2: Assumes identically loaded outputs with identical rise times, measured at VDD/2. The maximum skew between any two
clocks is 250 ps not 500 ps.
Note 3: Time taken for output to lock to new clock when mux selection changed from INA to INB.
Note 4. With 50 MHz on INA and 150 MHz on INB.
Note 5: With 100 MHz on both INA and INB, 180° out of phase.
Input Capacitance C
IN
5pF
Output High Voltage V
OH
I
OH
= -12 mA VDD-0.5 V
Output Low Voltage V
OL
I
OL
= 12 mA 0.5 V
Short Circuit Current I
OS
±70 mA
On-chip Pull-up
Resistor
R
PU
S1=0, OE1=0,
SELA, DIV pins
250 kΩ
Parameter Symbol Conditions Min. Typ. Max. Units
Input Frequency f
IN
6200MHz
Input Clock Duty Cycle at VDD/2 30 70 %
Skew t
SKEW
selected input clock to
FBIN, Note 1
-250 0 250 ps
between any output
clocks, Note 2
-250 0 250 ps
Transition Detector
Timeout
ICS581-02 only
DIV = 0 2 3 4
INB
periods
DIV = 1 32 48 64
INB
periods
Frequency Transition Time t
TRAN
50 to 150 MHz, Note 3, 4 70 200 µs
100 to 100 MHz, Note 3,
5
410 µs
Output Clock Rise Time t
OR
0.8 V to 2.0 V 1 2 ns
Output Clock Fall Time t
OF
2.0 V to 0.8 V 1 2 ns
Output Clock Duty Cycle
less than 133 MHz
at VDD/2, no load
45 55 %
greater than 133 MHz
at VDD/2, no load
40 60 %
with S0=S1=1
at VDD/2, no load
40 60 %
Absolute Output Clock
Period Jitter
t
JA
Deviation from mean ±150 ps
One Sigma Output Clock
Period Jitter
t
JA
40 ps
Parameter Symbol Conditions Min. Typ. Max. Units
P1-P3P4-P6P7-P9P10-P10

581G-01ILFT

Mfr. #:
Buy 581G-01ILFT
Manufacturer:
IDT
Description:
Clock Drivers & Distribution GLITCH-FREE CLOCK MULTIPLEXER
Lifecycle:
New from this manufacturer.
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