XC18V00 Series In-System Programmable Configuration PROMs
16 www.xilinx.com DS026 (v4.1) December 15, 2003
1-800-255-7778 Product Specification
R
AC Characteristics Over Operating Conditions for XC18V01 and XC18V512
OE/RESET
CE
CLK
DATA
T
CE
T
OE
T
LC
T
SCE
T
HCE
T
HOE
T
CAC
T
OH
T
DF
T
OH
T
HC
DS026_06_012000
T
CYC
Symbol Description Min Max Units
T
OE
OE/RESET to data delay - 10 ns
T
CE
CE to data delay - 15 ns
T
CAC
CLK to data delay - 15 ns
T
OH
Data hold from CE, OE/RESET, or CLK 0 - ns
T
DF
CE or OE/RESET to data float delay
(2)
-25ns
T
CYC
Clock periods 30 - ns
T
LC
CLK Low time
(3)
10 - ns
T
HC
CLK High time
(3)
10 - ns
T
SCE
CE setup time to CLK (guarantees proper counting)
(3)
20 - ns
T
HCE
CE High time (guarantees counters are reset) 250 - ns
T
HOE
OE/RESET hold time (guarantees counters are reset) 250 - ns
Notes:
1. AC test load = 50 pF.
2. Float delays are measured with 5 pF AC loads. Transition is measured at ±200 mV from steady state active levels.
3. Guaranteed by design, not tested.
4. All AC parameters are measured with V
IL
= 0.0V and V
IH
= 3.0V.
5. If T
HCE
High < 2 µs, T
CE
= 2 µs.
6. If T
HOE
High < 2 µs, T
OE
= 2 µs.
XC18V00 Series In-System Programmable Configuration PROMs
DS026 (v4.1) December 15, 2003 www.xilinx.com 17
Product Specification 1-800-255-7778
R
AC Characteristics Over Operating Conditions When Cascading for XC18V04 and
XC18V02
CLK
DATA
CE
CEO
First Bit
Last Bit
T
CDF
DS026_07_020300
OE/RESET
T
OCK
T
OOE
T
OCE
Symbol Description Min Max Units
T
CDF
CLK to data float delay
(2,3)
-25 ns
T
OCK
CLK to CEO delay
(3)
-20 ns
T
OCE
CE to CEO delay
(3)
-20 ns
T
OOE
OE/RESET to CEO delay
(3)
-20 ns
Notes:
1. AC test load = 50 pF.
2. Float delays are measured with 5 pF AC loads. Transition is measured at ±200 mV from steady state active levels.
3. Guaranteed by design, not tested.
4. All AC parameters are measured with V
IL
= 0.0V and V
IH
= 3.0V.
XC18V00 Series In-System Programmable Configuration PROMs
18 www.xilinx.com DS026 (v4.1) December 15, 2003
1-800-255-7778 Product Specification
R
AC Characteristics Over Operating Conditions When Cascading for XC18V01 and
XC18V512
CLK
DATA
CE
CEO
First Bit
Last Bit
T
CDF
DS026_07_020300
OE/RESET
T
OCK
T
OOE
T
OCE
Symbol Description Min Max Units
T
CDF
CLK to data float delay
(2,3)
-25 ns
T
OCK
CLK to CEO delay
(3)
-20 ns
T
OCE
CE to CEO delay
(3)
-20 ns
T
OOE
OE/RESET to CEO delay
(3)
-20 ns
Notes:
1. AC test load = 50 pF.
2. Float delays are measured with 5 pF AC loads. Transition is measured at ±200 mV from steady state active levels.
3. Guaranteed by design, not tested.
4. All AC parameters are measured with V
IL
= 0.0V and V
IH
= 3.0V.

XC18V512VQ44I

Mfr. #:
Manufacturer:
Xilinx
Description:
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