General Description
The MAX3645 limiting amplifier functions as a data
quantizer and is pin compatible with the Mindspeed
MC2045-2 and MC2045-2Y postamplifiers. The amplifi-
er accepts a wide range of input voltages and provides
constant-level positive emitter-coupled logic (PECL)
output voltages with controlled edge speeds.
The MAX3645 features an integrated power detector
with complementary PECL loss-of-signal (LOS) outputs
that indicate when the input power level drops below a
programmable threshold. An optional squelch function
holds the data outputs at static levels during a
LOS condition.
The MAX3645 operates from a single +3.3V or +5.0V
power supply over a -40°C to +85°C temperature
range. It is available in 16-pin SO and 16-pin QSOP
packages.
Applications
SONET 155Mbps Transceivers
Fast Ethernet Receivers
FDDI 125Mbps Receivers
FTTx Receivers
ESCON Receivers
Features
Pin Compatible with the Mindspeed
MC2045-2/MC2045-2Y
500µV Input Sensitivity (BER = 10
-12
)
Compatible with 4B/5B Data Coding
Programmable LOS Threshold
Stable LOS Threshold Over Supply Range
Output Disable Function and Automatic Squelch
Single +3.3V or +5.0V Power Supply
18mA Supply Current
MAX3645
+2.97V to +5.5V, 125Mbps to 200Mbps Limiting
Amplifier with Loss-of-Signal Detector
________________________________________________________________ Maxim Integrated Products 1
Ordering Information
19-3026; Rev 1; 11/04
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
PART TEMP RANGE PIN-PACKAGE
MAX3645ESE -40°C to +85°C 16 SO
MAX3645EEE -40°C to +85°C 16 QSOP
MAX3645EEE+ -40°C to +85°C 16 QSOP
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
CAZ2
TH
N.C.
V
CCE
DOUT+
DOUT-
GNDE
LOS
TOP VIEW
MAX3645
SO/QSOP
CAZ1
GNDA
V
CCA
DIN+
DIN-
CSD
DIS
LOS
Pin Configuration
MAX3645
MAX3644*
PIN K
IN
V
CC
V
CC
V
CC
V
CC
OUT-
OUT+
DIN+
DIN-
GNDA
DOUT+
DOUT-
LOS
LOS
DIS
CSD
V
CCA CAZ1 CAZ2
GND
*FUTURE PRODUCT
V
CCE
TH GNDE
N.C.
0.1µF
0.1µF
C
SD
1nF
C
AZ
0.1µF
R
TH
100
50
50 50 50
V
CC
- 2V
V
CC
- 2V
Typical Application Circuit
+Denotes lead-free package.
MAX3645
+2.97V to +5.5V, 125Mbps to 200Mbps Limiting
Amplifier with Loss-of-Signal Detector
2 _______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS
(V
CC
= +2.97V to +5.5V, PECL outputs are terminated with 50 to V
CC
- 2V, R
TH
= 100, C
AZ
= 0.1µF, C
SD
= 1nF, T
A
= -40°C to
+85°C. Typical values are at V
CC
= +3.3V, T
A
= +25°C, unless otherwise noted.)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
Power-Supply Voltage (V
CCA
, V
CCE
) ....................-0.5V to +7.0V
Voltage at CAZ1, CAZ2, DIN+,
DIN-, CSD, DIS, TH ................................-0.5V to (V
CC
+ 0.5V)
PECL Output Current (DOUT+, DOUT-, LOS,
LOS)...........50mA
Differential Voltage between CAZ1 and CAZ2......-1.5V to +1.5V
Differential Voltage between DIN+ and DIN-........-1.5V to +1.5V
Continuous Power Dissipation (T
A
= +85°C)
16-Pin SO (derate 8.7mW/°C above +85°C)................565mW
16-Pin QSOP (derate 8.3mW/°C above +85°C)...........540mW
Storage Ambient Temperature Range (T
S
)…….-65°C to +160°C
Lead Temperature (soldering, 10s)...........……………….+300°C
PARAMETER
SYM B O L
CONDITIONS
MIN
TYP
MAX
UNITS
POWER SUPPLY
Supply Current I
CC
Excludes PECL termination currents 18 27 mA
INPUT SPECIFICATIONS
Input Resistance R
IN
Single ended; V
IN
= ±200mV 3.3 4.8 6.4 k
Single ended 0.5
Input Sensitivity (Note 1)
V
IN-MIN
Differential 1.0
mV
P-P
Single ended 750
Input Overload (Note 1)
V
IN-MAX
Differential
1500
mV
P-P
Input-Referred Offset Voltage
Unterminated input, output offset divided by
DC gain (Note 2)
240µV
Input Common-Mode Voltage V
CMM
V
CC
-
0.87
V
Input-Referred RMS Noise
V
IN-NOISE
(Notes 2, 3) 36 50
µV
RMS
DIS Input High V
IH
PECL or CMOS logic
V
CC
-
1160
V
CC
mV
DIS Input Low V
IL
PECL or CMOS logic 0
V
CC
-
1480
mV
DIS Input Current I
IL
, I
IH
0V V
DIS
V
CC
-10
+10
µA
OUTPUT SPECIFICATIONS
PECL Output-Voltage High (Notes 1, 2)
V
CC
-
1085
V
CC
-
880
mV
PECL Output-Voltage Low (Notes 1, 2)
V
CC
-
1830
V
CC
-
1555
mV
Data Output Transition Time t
R
, t
F
20% to 80% (Notes 1, 2, 4) 0.7 1.4 ns
Pulse-Width Distortion PWD (Notes 1, 2, 4, 5) 30 200 ps
MAX3645
+2.97V to +5.5V, 125Mbps to 200Mbps Limiting
Amplifier with Loss-of-Signal Detector
_______________________________________________________________________________________ 3
Note 1: Between sensitivity and overload, the output amplitude is >95% of the fully limited amplitude and all AC specifications are met.
Note 2: Guaranteed by design and characterization.
Note 3: Noise is derived from BER measurement.
Note 4: The data input transition time is controlled by a 4th-order Bessel filter with f
-3dB
= 0.75 × data rate.
Note 5: PWD = [(width of wider pulse) - (width of narrower pulse)] / 2, measured with 155Mbps 0011 pattern.
Note 6: All LOS specifications are measured using a 155Mbps 2
23
- 1 PRBS pattern.
Note 7: The signal at the input is switched between two amplitudes, SIGNAL_ON and SIGNAL_OFF, as shown in Figure 1.
ELECTRICAL CHARACTERISTICS (continued)
(V
CC
= +2.97V to +5.5V, PECL outputs are terminated with 50 to V
CC
- 2V, R
TH
= 100, C
AZ
= 0.1µF, C
SD
= 1nF, T
A
= -40°C to
+85°C. Typical values are at V
CC
= +3.3V, T
A
= +25°C, unless otherwise noted.)
PARAMETER
SYM B O L
CONDITIONS
MIN
TYP
MAX
UNITS
TRANSFER CHARACTERISTICS
Bandwidth Gain = 60dB 150
250
MHz
C
AZ
= open
500
Low-Frequency Cutoff
C
AZ
= 0.1µF 0.5
kHz
LOSS-OF-SIGNAL SPECIFICATIONS (Notes 2, 4, 6)
LOS Sensitivity Range 0 R
TH
2k 220
mV
P-P
LOS Hysteresis 10log (V
DEASSERT
/V
ASSERT
) 1.4 2 dB
LOS Assert/Deassert Time (Note 7) 2.3
80.0
µs
R
TH
= 0, low setting 0.5 0.9 1.3
R
TH
= 1k, medium setting 4.8 6.6 8.3LOS Assert Level
R
TH
= 2k, high setting 12 17 22
mV
P-P
R
TH
= 0, low setting 1.1 1.5 1.9
R
TH
= 1k, medium setting 8.0
10.8 13.5
LOS Deassert Level
R
TH
= 2k, high setting 20 28 36
mV
P-P
Signal-Dectect Filter Resistance R
SD
Pin 7 14 20 26 k
Figure 1. Signal Levels for LOS Assert/Deassert Time
Measurement

MAX3645ESE+

Mfr. #:
Manufacturer:
Maxim Integrated
Description:
Limiting Amplifiers 2.97-5.V 125-200Mbps
Lifecycle:
New from this manufacturer.
Delivery:
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