Triple Output Step-Down Switching Regulator
A4491
13
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
This calculation assumes no thermal influence from other compo-
nents. If possible, it is advisable to mount the flyback diodes on
the reverse side of the printed circuit board. Ensure low imped-
ance electrical connections are implemented between board
layers.
PCB Layout Guidelines The ground plane is largely dictated
by the thermal requirements described in the previous section.
The ground referenced power components should be referenced
to a star ground, located away from the A4491 to minimize
ground bounce issues.
A small, local, relatively quiet ground plane near the A4491 should
be used for the ground referenced support components, to mini-
mize interference effects of ground noise from the power circuitry.
Figure 4 illustrates the recommended grounding architecture.
To avoid ground bounce and offset issues, it is highly recom-
mended that the ground referenced feedback resistors (R2, R4,
and R6) should be connected as close to the GND connection of
the A4491 as possible.
A local quiet ground plane around these components can be
implemented, however, this ground plane should have a high
impedance connection to the star connection of the power stages.
If a ground plane is used, it is recommended that it does not
overlap the switching nodes (LX1, LX2, and LX3) to avoid the
possibility of noise pick-up. To minimize the possibility of noise
injection issues, it is recommended to isolate the ground plane
around high impedance nodes such as: FBx, ENBx and CPOR.
In terms of grounding the power components, a star connection
should be made to minimize the ground loop impedances. Note
that although a ground plane may be required to meet the thermal
characteristics of the solution it is still imperative to implement
a ground star connection for the power components. The ground
for the charge pump (PGND) should be connected to the thermal
vias.
Figures 5 and 6 below illustrates the importance of keeping the
ground connections as short as possible and forming good star
connections.
Figure 5 also illustrates the current conduction paths during the
on-cycle of the switching FET. The following points should be
noted:
• The capacitor C
IN
should be placed as close as possible to the
Q
L
R
LOAD
V
BB
V
REG
D
C
OUT
C
IN
LX
Star Connection
Figure 5. FET on-cycle current conduction paths
R
LOAD
V
BB
V
REG
C
OUT
C
IN
Q
L
D
LX
Star Connection
Figure 6. FET off-cycle current conduction paths
Cin
Cout
D
Star Connection
A4491
Internal Ground Plane
Thermal Vias
Power Circuitry
A4491 Support
Com
onents
Local “Quiet’
Ground Plane
GND
PGND
Figure 4. Ground plane configurations
