6.42
IDT70V3319/99S
High-Speed 3.3V 256/128K x 18 Dual-Port Synchronous Static RAM Industrial and Commercial Temperature Ranges
6
NOTES:
1. "H" = V
IH, "L" = VIL, "X" = Don't Care.
2. ADS, CNTEN, REPEAT = X.
3. OE is an asynchronous input signal.
Truth Table I—Read/Write and Enable Control
(1,2,3)
OE
CLK
CE
0
CE
1
UB LB
R/W
Upper Byte
I/O
9-17
Lower Byte
I/O
0-8
MODE
X
↑
HXXXX High-Z High-ZDeselected–Power Down
X
↑
X L X X X High-Z High-Z Deselected–Power Down
X
↑
L H H H X High-Z High-Z Both Bytes Deselected
X
↑
LHHLL High-Z D
IN
Write to Lower Byte Only
X
↑
LHLHL D
IN
High-Z Write to Upper Byte Only
X
↑
LHLLL D
IN
D
IN
Write to Both Bytes
L
↑
LHHLH High-Z D
OUT
Read Lower Byte Only
L
↑
LHLHH D
OUT
High-Z Read Upper Byte Only
L
↑
LHLLH D
OUT
D
OUT
Read Both Bytes
H
↑
L H L L X High-Z High-Z Outputs Disabled
5623 tbl 02
Truth Table II—Address Counter Control
(1,2)
NOTES:
1. "H" = V
IH, "L" = VIL, "X" = Don't Care.
2. Read and write operations are controlled by the appropriate setting of R/W, CE
0, CE1, UB, LB and OE.
3. Outputs configured in flow-through output mode: if outputs are in pipelined mode the date out will be delayed by one cycle.
4. ADS and REPEAT are independent of all other memory control signals including CE
0, CE1 and UB, LB.
5. The address counter advances if CNTEN = V
IL on the rising edge of CLK, regardless of all other memory control signals including CE0, CE1, UB, LB.
6. When REPEAT is asserted, the counter will reset to the last valid address loaded via ADS. This value is not set at power-up: a known location should be loaded
via ADS during initialization if desired. Any subsequent ADS access during operations will update the REPEAT address location.
External
Address
Previous
Internal
Address
Internal
Address
Used CLK
ADS CN T EN REPEAT
(6 )
I/O
(3 )
MODE
XXAn
↑
XX L
(4 )
D
I/O
(0) Counter Reset to last valid ADS load
An X An
↑
L
(4 )
XHD
I/O
(n) External Address Used
An Ap Ap
↑
HH H D
I/O
(p) External Address Blocked—Counter disabled (Ap reused)
XApAp + 1
↑
H L
(5 )
HD
I/O
(p+1) Counter Enabled—Internal Address generation
5623 tbl 03