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NCP1550SN25T1

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P17
NCP1550
http://onsemi.com
13
DETAILED OPERATING DESCRIPTION
Detailed Operating Description
The NCP1550 series are step−down (Buck) DC−DC
controllers designed primarily for use in portable
applications powered by battery cells. With an appropriate
external P−channel MOSFET connected, the device can
provide up to 2 A loading current with high conversion
efficiency. The NCP1550 series using an unique control
scheme combines the advantages of Pulse−Frequency−
Modulation (PFM) that can provide excellent efficiency
even at light loading conditions and Constant−Frequency
Pulse−Width−Modulation that can achieve high efficiency
and low output voltage ripple at heavy loads. The NCP1550
working at high switching frequency makes it possible to use
small size surface mount inductor and capacitors to reduce
PCB area and provide better interference handling for noise
sensitive applications. The simplified functional blocks of
the device are shown in Figure 1 and descriptions for each
of the functions are given below.
The Internal Oscillator
An oscillator that governs the switching of a PWM control
cycles is required. NCP1550 have an internal Fixed−
Frequency oscillator. The oscillator frequency is trimmed to
600 kHz with an accuracy of ±15%. All other timing signals
needed for operation are derived from this oscillator signal.
Voltage Reference and Soft−Start
An internal high accuracy voltage reference is included in
NCP1550. This reference voltage is connected to the
inverting input terminal of the error amplifier, A1, which
compared with portion of the output voltage, V
OUT
derived
from an integrated voltage divider with precise trimming to
give the required output voltage at ±2% accuracy. NCP1550
also comes with a built−in soft−start circuit that controls the
ramping up of the internal reference voltage during the
power−up of the converter. This function effectively enables
the output voltage to rise gradually over the specified
soft−start time, 8 msec typical. This prevents the output
voltage from overshooting during startup of the converter.
Voltage Mode Pulse−Width−Modulation (PWM)
Control Scheme
For normal operation, NCP1550 is working in
Constant−Frequency Pulse−Width−Modulation (PWM)
Voltage Mode Control. The controller operates with the
internal oscillator, which generates the required ramp
function to compare with the output of the error amplifier, A1.
The error amplifier compares the internally divided−down
output voltage with the voltage reference to produce an error
voltage at its output. This error voltage is compared with the
ramp function to generate the control pulse to drive the
external power switch. On a cycle−by−cycle basis, the
greater the error voltage, the longer the switch is held on.
Hence, corresponding corrective action will be made to keep
the output voltage within regulation. Constant−Frequency
PWM reduces output voltage ripple and noise, which is one
of the important characteristics for noise sensitive
communication applications. The high switching frequency
allows small size surface mount components to improve
layout compactness and reduce PC board area, and eliminate
audio and emission interference.
Power−Saving Pulse−Frequency−Modulation (PFM)
Control Scheme
While the loading is decreasing, the converter enters the
Discontinuous Conduction Mode (DCM) operation, which
means the inductor current will decrease to zero before the
next switching cycle starts. In DCM operation, the ON time
for each switching cycle will decrease significantly when
the output current decreases. In order to maintain a high
conversion efficiency even at light load conditions, the ON
time for each switching cycle is closely monitored and for
any ON time smaller than the preset value, 320 nsec, the
switching pulse will be skipped. As a result, when the
loading current is small, the converter will be operating in a
“Constant ON time (320 nsec nominal), variable OFF time”
Pulse−Frequency Modulation (PFM) mode. This innovative
control scheme improves the conversion efficiency for the
system at light load and standby operating conditions hence
extend the operating life of the battery.
Low Power Shutdown Mode
NCP1550 can be disabled whenever the CE pin (Pin 1) is
tied to GND. In shutdown, the internal reference, oscillator,
control circuitry, driver and internal feedback voltage
divider are turned off and the output voltage falls to 0 V.
During the shutdown mode, as most of the internal functions
are stopped and current paths are cut−off, the device
consume extremely small current in this condition.
Under−Voltage Lockout (UVLO)
To prevent operation of the P−Channel MOSFET below
safe input voltage levels, an Undervoltage Lockout is
incorporated into the NCP1550. When the input supply
voltage drops below approximately 2.2 V, the comparator,
CP1 will turn−off the control circuitry and shut the converter
down.
NCP1550
http://onsemi.com
14
APPLICATIONS INFORMATION
Inductor Value Calculation
Selecting the proper inductance is a trade−off between
inductor’s physical size, transient respond and power
conversion requirements. Lower value inductor saves cost,
PC board space and providing faster transient response, but
result in higher ripple current and core losses. Considering an
application with loading current, I
OUT
= 0.5 A and the
inductor ripple current, I
L−RIPPLE(P−P)
is designed to be less
than 40% of the load current, i.e. 0.5 A x 40% = 0.2 A.
The relationship between the inductor value and inductor
ripple current is given by,
(eq. 1)
L +
T
ON
*(V
IN
* R
DS(ON)
I
OUT
* V
OUT)
I
L*RIPPLE(P*P)
Where R
DS(ON)
is the ON resistance of the external
P−channel MOSFET. Figure 39 is a plot for recommended
inductance against nominal input voltage for different output
options.
Figure 39. Inductor Selection Chart
0
2
4
6
8
10
12
2.2 2.7 3.2 3.7 4.2 4.7 5.2
1.8 V
2.5 V
3.3 V
L, INDUCTANCE (mH)
V
IN
, INPUT VOLTAGE OF NCP1550 (V)
R
DS(ON)
= 0.1 W
1.9 V
2.7 V
3.0 V
P−Channel Power MOSFET Selection
An external P−Channel power MOSFET must be used with
the NCP1550. The key selection criteria for the power
MOSFET are the gate threshold, V
GS
, the “ON” resistance,
R
DS(ON)
and its total gate charge, Q
T
. For low input voltage
operation, we need to select a low gate threshold device that
can work down to the minimum input voltage level. R
DS(ON)
determines the conduction losses for each switching cycle,
the lower the ON resistance, the higher the efficiency can be
achieved. A power MOSFET with lower gate charge can give
lower switching losses but the fast transient can cause
unwanted EMI to the system. Compromise in between is
required during the design stage. For 1.0 A and 2.0 A load
current, NTGS3441T1 and NTGS3443T1 are tested to be
appropriate for most applications.
Flywheel Diode Selection
The flywheel diode is turned on and carries load current
during the off time. The average diode current depends on the
P−Channel switch duty cycle. At high input voltages, the
diode conducts most of the time. In case of V
IN
approaches
V
OUT
, the diode conducts only a small fraction of the cycle.
While the output terminals are shorted, the diode will subject
to its highest stress. Under this condition, the diode must be
able to safely handle the peak current circulating in the loop.
So, it is important to select a flywheel diode that can meet the
diode peak current and average power dissipation
requirements. Under normal conditions, the average current
conducted by the flywheel diode is given by:
(eq. 2)
I
D
+
V
IN
* V
OUT
V
IN
) V
F
I
OUT
Where I
D
is the average diode current and V
F
is the forward
diode voltage drop.
A fast switching diode must also be used to optimize
efficiency. Schottky diodes are a good choice for low forward
drop and fast switching times.
Input and Output Capacitor Selection (C
IN
and C
OUT
)
In continuous mode operation, the source current of the
P−Channel MOSFET is a square wave of duty cycle (V
OUT
+
V
F
)/V
IN
. To prevent large input voltage transients, a low ESR
input capacitor that can support the maximum RMS input
current must be selected. The maximum RMS input current,
I
RMS(MAX)
can be estimated by the equation in below:
(eq. 3)
I
RMS(MAX)
[ I
OUT
V
OUT
(V
IN
* V
OUT
)
1
2
V
IN
Above estimation has a maximum value at V
IN
= 2V
OUT
,
where I
RMS(MAX)
= I
OUT
/2. As a general practice, this simple
worst−case condition is used for design.
Selection of the output capacitor, C
OUT
is primarily
governed by the required effective series resistance (ESR) of
the capacitor. Typically, once the ESR requirement is met, the
capacitance will be adequate for filtering. The output voltage
ripple, V
RIPPLE
is approximated by:
(eq. 4)
V
RIPPLE
[ I
L * RIPPLE(P*P)
(ESR )
1
4F
OSC
C
OUT
)
Where F
OSC
is the switching frequency and ESR is the
effective series resistance of the output capacitor.
From equation (4), it can be noted that the output voltage
ripple contributed by two parts. For most of the case, the
major contributor is the capacitor ESR. Ordinary
aluminum−electrolytic capacitors have high ESR and should
be avoided. Higher quality Low ESR aluminum−electrolytic
capacitors are acceptable and relatively inexpensive. For even
better performance, Low ESR tantalum capacitors should be
used. Surface−mount tantalum capacitors are better and
provide neat and compact solution for space sensitive
applications.
NCP1550
http://onsemi.com
15
PCB Layout Recommendations
Good PCB layout plays an important role in switching
mode power conversion. Careful PCB layout can help to
minimize ground bounce, EMI noise and unwanted
feedbacks that can affect the performance of the converter.
Suggested hints below can be used as a guideline in most
situations.
Grounding
Star−ground connection should be used to connect the
output power return ground, the input power return ground
and the device power ground together at one point. All high
current running paths must be thick enough for current
flowing through and producing insignificant voltage drop
along the path. Feedback signal path must be separated from
the main current path and sensing directly at the anode of the
output capacitor.
Components Placement
Power components, i.e. input capacitor, inductor and
output capacitor, must be placed as close together as possible.
All connecting traces must be short, direct and thick. High
current flowing and switching paths must be kept away from
the feedback (V
OUT
, pin 3) terminal to avoid unwanted
injection of noise into the feedback path.
Feedback Path
Feedback of the output voltage must be a separate trace
separated from the power path. The output voltage sensing
trace to the feedback (V
OUT
, pin 3) pin should be connected
to the output voltage directly at the anode of the output
capacitor.
External Component Reference Data
Device V
OUT
Inductor Model
Inductor
(L)
External MOSFET
(M)
Diode
(SD)
Output and Input
Capacitor
C
OUT
/C
IN
NCP1550SN18T1 1.8 V CDD5D23 6R8 (1A)
CDRH6D38 6R8 (2A)
Sumida
6.8 mH
NTGS3441T1 (1A)
NTGS3443T1 (2A)
ON Semiconductor
MBRM120LT3
ON Semiconductor
33 mF/33 mF (1A)
68 mF/33 mF (2A)
KEMET
(T494 series)
NCP1550SN19T1 1.9 V CDC5D23 6R8 (1A)
CDRH6D38 6R8 (2A)
Sumida
6.8 mH
NTGS3441T1 (1A)
NTGS3443T1 (2A)
ON Semiconductor
MBRM120LT3
ON Semiconductor
33 mF/33 mF (1A)
68 mF/33 mF (2A)
KEMET
(T494 series)
NCP1550SN25T1 2.5 V CDC5D23 5R6 (1A)
CDRH6D38 5R0 (2A)
Sumida
5.6 mH
5.0 mH
NTGS3441T1 (1A)
NTGS3443T1 (2A)
ON Semiconductor
MBRM120LT3
ON Semiconductor
33 mF/33 mF (1A)
68 mF/33 mF (2A)
KEMET
(T494 series)
NCP1550SN27T1 2.7 V CDC5D23 5R6 (1A)
CDRH6D38 5R0 (2A)
Sumida
5.6 mH
5.0 mH
NTGS3441T1 (1A)
NTGS3443T1 (2A)
ON Semiconductor
MBRM120LT3
Semiconductor
33 mF/33 mF (1A)
68 mF/33 mF (2A)
KEMET
(T494 series)
NCP1550SN30T1 3.0 V CDC5D23 4R7 (1A)
CDRH6D28 5R0 (2A)
Sumida
5.6 mH
5.0 mH
NTGS3441T1 (1A)
NTGS3443T1 (2A)
ON Semiconductor
MBRM120LT3
ON Semiconductor
33 mF/33 mF (1A)
68 mF/33 mF (2A)
KEMET
(T494 series)
NCP1550SN33T1 3.3 V CD43 3R3 (1A)
CDRH6D38 3R3 (2A)
Sumida
3.3 mH
NTGS3441T1 (1A)
NTGS3443T1 (2A)
ON Semiconductor
MBRM120LT3
ON Semiconductor
68 mF/33 mF (1A)
100 mF/68 mF (2A)
KEMET
(T494 series)
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P17

NCP1550SN25T1

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