TDA9885_TDA9886_3 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 03 — 16 December 2008 17 of 56
NXP Semiconductors
TDA9885; TDA9886
I
2
C-bus controlled multistandard alignment-free IF-PLL demodulators
9.2.1 Subaddress (A data)
If more than one data byte is transmitted, then auto-increment is performed: starting from
the transmitted subaddress and auto-increment of subaddress in accordance with the
order of Table 9.
[1] Bit A7 = 1 is not allowed.
[2] Bits A6 to A2 will be ignored by the internal hardware.
9.2.2 Data byte for switching mode (B data)
[1] For positive AM TV choose 6.5 MHz for the second SIF.
Table 9. Definition of the subaddress (second byte after slave address)
X = don’t care.
Register MSB LSB
A7
[1]
A6
[2]
A5
[2]
A4
[2]
A3
[2]
A2
[2]
A1 A0
SAD for switching mode 0 XXXXX00
SAD for adjust mode 0 XXXXX01
SAD for data mode 0 XXXXX10
Table 10. Bit description of SAD register for switching mode (SAD = 00)
Bit Symbol Description
7 B7 output port 2 for SAW switching or monitoring
1 = high-impedance, disabled or HIGH
0 = low-impedance, active or LOW
6 B6 output port 1 for SAW switching or external input
1 = high-impedance, disabled or HIGH
0 = low-impedance, active or LOW
5 B5 forced audio mute
1=on
0 = off
4 and 3 B[4:3] TV standard modulation
00 = positive AM TV
[1]
01 = not used
10 = negative FM TV
11 = not used
2 B2 carrier mode
1 = QSS mode
0 = intercarrier mode
1 B1 auto mute of FM AF output
1 = active
0 = inactive
0 B0 video mode (sound trap)
1 = sound trap bypass
0 = sound trap active
