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MC100E142FNR2G

P1-P3P4-P6P7-P8
© Semiconductor Components Industries, LLC, 2006
February, 2006 − Rev. 7
1 Publication Order Number:
MC10E142/D
MC10E142, MC100E142
5VECL 9-Bit Shift Register
Description
The MC10E/100E142 is a 9-bit shift register, designed with
byte-parity applications in mind. The E142 performs serial/parallel in
and serial/parallel out, shifting in one direction. The nine inputs
D0 − D8 accept parallel input data, while S-IN accepts serial input
data. The Qn outputs do not need to be terminated for the shift
operation to function. To minimize noise and power, any Q output not
used should be left unterminated.
The SEL (Select) input pin is used to switch between the two modes
of operation − SHIFT and LOAD. The shift direction is from bit 0 to
bit 8. Input data is accepted by the registers a set-up time before the
positive going edge of CLK1 or CLK2; shifting is also accomplished
on the positive clock edge. A HIGH on the Master Reset pin (MR)
asynchronously resets all the registers to zero.
The 100 Series contains temperature compensation.
Features
• 700 MHz Min. Shift Frequency
• 9-Bit for Byte-Parity Applications
• Asynchronous Master Reset
• Dual Clocks
• PECL Mode Operating Range: V
CC
= 4.2 V to 5.7 V
with V
EE
= 0 V
• NECL Mode Operating Range: V
CC
= 0 V
with V
EE
= −4.2 V to −5.7 V
• Internal Input 50 kW Pulldown Resistors
• ESD Protection: Human Body Model; > 2 kV,
Machine Model; > 200 V
• Meets or Exceeds JEDEC Standard EIA/JESD78 IC Latchup Test
• Moisture Sensitivity Level:
Pb = 1
Pb−Free = 3
For Additional Information, see Application Note AND8003/D
• Flammability Rating: UL 94 V−0 @ 0.125 in,
Oxygen Index: 28 to 34
• Transistor Count = 405 devices
• Pb−Free Packages are Available*
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
MARKING DIAGRAM*
xxx = 10 or 100
A = Assembly Location
WL = Wafer Lot
YY = Year
WW = Work Week
G = Pb−Free Package
PLCC−28
FN SUFFIX
CASE 776
MCxxxE142G
AWLYYWW
1
http://onsemi.com
*For additional marking information, refer to
Application Note AND8002/D.
See detailed ordering and shipping information in the package
dimensions section on page 6 of this data sheet.
ORDERING INFORMATION
MC10E142, MC100E142
http://onsemi.com
2
D
2
D
3
D
4
V
CCO
Q
0
Q
1
Q
2
V
CCO
D
5
D
6
D
7
D
8
SEL
MR
CLK1
CLK2
V
EE
S-IN
D
0
D
1
26
27
28
2
3
4
25 24 23 22 21 20 19
18
17
16
15
14
13
12
11567 8910
Q
8
Q
7
Q
6
V
C
Q
5
V
C
Q
4
Q
3
1
Figure 1. Pinout: PLCC−28 (Top View)
* All V
CC
and V
CCO
pins are tied together on the die.
Warning: All V
CC
, Vf
CCO
, and V
EE
pins must be externally
connected to Power Supply to guarantee proper operation.
MC10E142/MC100E142
Table 1. PIN DESCRIPTION
Pin Function
D
0
− D
8
ECL Parallel Data Inputs
S-IN ECL Serial Data Input
SEL ECL Mode Select Input
CLK1, CLK2 ECL Clock Inputs
MR ECL Master Reset
Q
0
− Q
8
ECL Data Outputs
V
CC
, V
CCO
Positive Supply*
V
EE
Negative Supply
*From V
CC
pin to each V
CCO
pin is an internal 100 W resistor.
Figure 2. Logic Diagram
S-IN
D
0
D
1
D
2
D
3
D
8
SEL
CLK1
CLK2
MR
Q
0
Q
1
Q
2
Q
3
Q
8
D
Q
D
D
D
D
Q
Q
Q
Q
1
0
1
0
1
0
1
0
1
0
Table 2. FUNCTIONS
SEL Mode
L
H
Load
Shift
MC10E142, MC100E142
http://onsemi.com
3
Table 3. MAXIMUM RATINGS
Symbol Parameter Condition 1 Condition 2 Rating Unit
V
CC
PECL Mode Power Supply V
EE
= 0 V 8 V
V
EE
NECL Mode Power Supply V
CC
= 0 V −8 V
V
I
PECL Mode Input Voltage
NECL Mode Input Voltage
V
EE
= 0 V
V
CC
= 0 V
V
I
V
CC
V
I
V
EE
6
−6
V
V
I
out
Output Current Continuous
Surge
50
100
mA
mA
T
A
Operating Temperature Range 0 to +85 °C
T
stg
Storage Temperature Range −65 to +150 °C
q
JA
Thermal Resistance (Junction−to−Ambient) 0 lfpm
500 lfpm
PLCC−28
PLCC−28
63.5
43.5
°C/W
°C/W
q
JC
Thermal Resistance (Junction−to−Case) Standard Board PLCC−28 22 to 26 °C/W
V
EE
PECL Operating Range
NECL Operating Range
4.2 to 5.7
−5.7 to −4.2
V
V
T
sol
Wave Solder Pb
Pb−Free
265
265
°C
Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit
values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied,
damage may occur and reliability may be affected.
Table 4. 10E SERIES PECL DC CHARACTERISTICS V
CCx
= 5.0 V; V
EE
= 0.0 V (Note 1)
0°C 25°C 85°C
Symbol Characteristic Min Typ Max Min Typ Max Min Typ Max Unit
I
EE
Power Supply Current 120 145 120 145 120 145 mA
V
OH
Output HIGH Voltage (Note 2) 3980 4070 4160 4020 4105 4190 4090 4185 4280 mV
V
OL
Output LOW Voltage (Note 2) 3050 3210 3370 3050 3210 3370 3050 3227 3405 mV
V
IH
Input HIGH Voltage 3830 3995 4160 3870 4030 4190 3940 4110 4280 mV
V
IL
Input LOW Voltage 3050 3285 3520 3050 3285 3520 3050 3302 3555 mV
I
IH
Input HIGH Current 150 150 150
mA
I
IL
Input LOW Current 0.5 0.3 0.5 0.25 0.3 0.2
mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
1. Input and output parameters vary 1:1 with V
CC
. V
EE
can vary −0.46 V / +0.06 V.
2. Outputs are terminated through a 50 W resistor to V
CC
− 2.0 V.
P1-P3P4-P6P7-P8

MC100E142FNR2G

Mfr. #:
Buy MC100E142FNR2G
Manufacturer:
ON Semiconductor
Description:
Counter Shift Registers BBG ECL SHIFT REG 9BIT
Lifecycle:
New from this manufacturer.
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