LT1970A
7
1970afc
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Typical perForMance characTerisTics
Safe Operating Area
Output Stage Quiescent Current
vs Supply Voltage
Control Stage Quiescent Current
vs Supply Voltage
Supply Current vs Supply Voltage
in Shutdown
Low Level Current Sense
Transfer Curve
Logic Output Level
vs Sink Current (Output Low)
Maximum Output Current
vs Temperature
V
CSNK
= V
CSRC
(mV)
0
V
SENSE
(mV)
5
15
25
200
1970A G22
–5
–15
0
10
20
–10
–20
–25
5025
10075
150 175 225
125
250
SOURCING
CURRENT
SINKING
CURRENT
SINK CURRENT (mA)
0.001
0.4
LOGIC OUTPUT VOLTAGE (V)
0.5
0.6
0.7
0.8
0.01 0.1 1 10
100
1970A G23
0.3
0.2
0.1
0
0.9
1.0
V
+
= 15V
V
= –15V
125°C
25°C
–55°C
TEMPERATURE (°C)
–75
OUTPUT CURRENT (mA)
800
1200
125
1970A G24
400
0
–25
25
75
–50
0
50
100
1600
600
1000
200
1400
V
+
= 15V
V
= –15V
SOURCE
SINK
SUPPLY VOLTAGE (V)
0
0
I
OUT
PEAK (mA)
200
400
600
800
10 20
30
40
1970A G25
1000
1200
5 15
25
35
I
OUT
AT 10% DUTY CYCLE
SUPPLY VOLTAGE (±V)
0
OUTPUT STAGE CURRENT (mA)
–10
–6
–2
6
4
8
10
18
1970A G26
10
2
–8
–4
4
8
0
2 6
12
14
16
I
V
+
I
V
25°C
25°C
–55°C
–55°C
125°C
125°C
SUPPLY VOLTAGE (±V)
0
SUPPLY CURRENT (mA)
–5
–3
–1
3
4
8
10
18
1970A G27
5
1
–4
–2
2
4
0
2 6
12
14
16
I
CC
I
EE
25°C
25°C
–55°C
–55°C
125°C
125°C
SUPPLY VOLTAGE (V)
0
TOTAL SUPPLY CURRENT, I
CC
+ I
V
+ (µA)
400
500
600
16
1970A G28
300
200
0
4
8
12
2
18
6
10
14
100
800
700
85°C
25°C
–55°C
V
ENABLE
= 0V
LT1970A
8
1970afc
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pin FuncTions
V
EE
(Pins 1, 10, 11, 20, 21): Minus Supply Voltage. V
EE
connects to the substrate of the integrated circuit die, and
therefore must always be the most negative voltage ap
-
plied to the part. Decouple V
EE
to ground with a low ESR
capacitor. V
EE
may be a negative voltage or it may equal
ground potential. Any or all of the V
EE
pins may be used.
Unused V
EE
pins must remain open.
V
(Pin 2):
Output Stage Negative Supply. V
may equal
V
EE
or may be smaller in magnitude. Only output stage
current flows out of V
, all other current flows out of V
EE
.
V
may be used to drive the base/gate of an external power
device to boost the amplifiers output current to levels above
the rated 500mA of the on-chip output devices. Unless
used to drive boost transistors, V
should be decoupled
to ground with a low ESR capacitor.
OUT (Pin 3): Amplifier Output. The OUT pin provides the
force function as part of a Kelvin sensed load connection.
OUT is normally connected directly to an external load cur
-
rent sense resistor and the SENSE
+
pin. Amplifier feedback
is directly connected to the load and the other end of the
current sense resistor. The load connection is also wired
directly to the SENSE
pin to monitor the load current.
The OUT pin is current limited to ±800mA typical. This
current limit protects the output transistor in the event that
connections to the external sense resistor are opened or
shorted which disables the precision current limit function.
SENSE
+
(Pin 4): Positive Current Sense Pin. This lead is
normally connected to the driven end of the external sense
resistor. Sourcing current limit operation is activated when
the voltage V
SENSE
(V
SENSE
+ – V
SENSE
–) equals 1/10 of
the programming control voltage at VC
SRC
(Pin 13). Sink-
ing current limit operation is activated when the voltage
V
SENSE
equals –1/10 of the programming control voltage
at VC
SNK
(Pin 12).
FILTER (Pin 5): Current Sense Filter Pin. This pin is
normally not used and should be left open or shorted to
the SENSE
pin. The FILTER pin can be used to adapt the
response time of the current sense amplifiers with a 1nF
to 100nF capacitor connected to the SENSE
input. An
internal 1k resistor sets the filter time constant.
SENSE
(Pin 6): Negative Current Sense Pin. This pin is
normally connected to the load end of the external sense
resistor.
Sourcing current limit operation is activated when
the voltage V
SENSE
(V
SENSE
+ – V
SENSE
–) equals 1/10 of
the programming control voltage at VC
SRC
(Pin 13). Sink-
ing current limit operation is activated when the voltage
V
SENSE
equals –1/10 of the programming control voltage
at VC
SNK
(Pin 12).
V
CC
(Pin 7): Positive Supply Voltage. All circuitry except
the output transistors draw power from V
CC
. Total supply
voltage from V
CC
to V
EE
must be between 3.5V and 36V.
V
CC
must always be greater than or equal to V
+
. V
CC
should
always be decoupled to ground with a low ESR capacitor.
–IN (Pin 8): Inverting Input of Amplifier. –IN may be any
voltage from V
EE
– 0.3V to V
EE
+ 36V. –IN and +IN remain
high impedance at all times to prevent current flow into
the inputs when current limit mode is active. Care must
be taken to ensure that –IN or +IN can never go to a volt
-
age below V
EE
– 0.3V even during transient conditions or
damage to the circuit may result. A Schottky diode from
V
EE
to –IN can provide clamping if other elements in the
circuit can allow –IN to go below V
EE
.
+IN (Pin 9): Noninverting Input of Amplifier. +IN may be any
voltage from V
EE
– 0.3V to V
EE
+ 36V. –IN and +IN remain
high impedance at all times to prevent current flow into
the inputs when current limit mode is active. Care must
be taken to ensure that –IN or +IN can never go to a volt
-
age below V
EE
– 0.3V even during transient conditions or
damage to the circuit may result. A Schottky diode from
V
EE
to +IN can provide clamping if other elements in the
circuit can allow +IN to go below V
EE
.
LT1970A
9
1970afc
For more information www.linear.com/LT1970A
pin FuncTions
VC
SNK
(Pin 12): Sink Current Limit Control Voltage In-
put. The current sink limit amplifier will activate when
the sense voltage between SENSE
+
and SENSE
equals
–1.0 V
VCSNK
/10. VC
SNK
may be set between V
COMMON
and V
COMMON
+ 6V. The transfer function between VC
SNK
and V
SENSE
is linear except for very small input voltages
at VC
SNK
< 60mV. V
SENSE
limits at a minimum set point
of 4mV typical to ensure that the sink and source limit
amplifiers do not try to operate simultaneously. To force
zero output current, the ENABLE pin can be taken low.
VC
SRC
(Pin 13): Source Current Limit Control Voltage
Input. The current source limit amplifier will activate
when the sense voltage between
SENSE
+
and
SENSE
equals V
VCSRC
/10. VC
SRC
may be set between V
COMMON
and V
COMMON
+ 6
V
. The transfer function between VC
SRC
and V
SENSE
is linear except for very small input voltages
at VC
SRC
< 60m
V
. V
SENSE
limits at a minimum set point
of 4mV typical to ensure that the sink and source limit
amplifiers do not try to operate simultaneously.
To force
zero output current, the ENABLE pin can be taken low.
COMMON (Pin 14): Control and ENABLE inputs and flag
outputs are referenced to the COMMON pin. COMMON
may be at any potential between V
EE
and V
CC
– 3
V
. In
typical applications, COMMON is connected to ground.
ENABLE (Pin 15): ENABLE Digital Input Control. When
taken low this TTL-level digital input turns off the ampli-
fier output and drops supply current to less than 1mA.
Use the ENABLE pin to for
ce zero output current. Setting
VC
SNK
= VC
SRC
= 0V allows I
OUT
= ±4mV/R
SENSE
to flow
in or out of V
OUT
.
ISRC (Pin 16): Sourcing Current Limit Digital Output Flag.
ISRC is an open-collector digital output. ISRC pulls low
whenever the sourcing current limit amplifier assumes
control of the output. This pin can sink up to 10mA of
current. The current limit flag is off when the source
current limit is not active. ISRC, ISNK and TSD may be
wired “OR” together if desired. ISRC may be left open if
this function is not monitored.
ISNK (Pin 17): Sinking Current Limit Digital Output Flag.
ISNK is an open-collector digital output. ISNK pulls low
whenever the sinking current limit amplifier assumes
control of the output. This pin can sink up to 10mA of
current. The current limit flag is off when the source
current limit is not active. ISRC, ISNK and TSD may be
wired “OR” together if desired. ISNK may be left open if
this function is not monitored.
TSD (Pin 18): Thermal Shutdown Digital Output Flag. TSD
is an open-collector digital output. TSD pulls low whenever
the internal thermal shutdown circuit activates, typically at
a die temperature of 160°C. This pin can sink up to 10mA
of output current. The TSD flag is off when the die tem
-
perature is within normal operating temperatures. ISRC,
ISNK and TSD may be wired “OR” together if desired. TSD
may be left open if this function is not monitored. Thermal
shutdown activation should prompt the user to evaluate
electrical loading or thermal environmental conditions.
V
+
(Pin 19): Output Stage Positive Supply. V
+
may equal
V
CC
or may be smaller in magnitude. Only output stage
current flows through V
+
, all other current flows into V
CC
.
V
+
may be used to drive the base/gate of an external power
device to boost the amplifiers output current to levels above
the rated 500mA of the on-chip output devices. Unless
used to drive boost transistors, V
+
should be decoupled
to ground with a low ESR capacitor.
Exposed Pad (Pin 21): The exposed backside of the pack
-
age is electrically connected to the V
EE
pins on the IC die.
The package base should be soldered to a heat spreading
pad on the PC board that is electrically connected to V
EE
.

LT1970ACFE#TRPBF

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Operational Amplifiers - Op Amps 500mA Power OA with Adj. Current Limit
Lifecycle:
New from this manufacturer.
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