ADF7901
Rev. A | Page 6 of 12
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
TOPVIEW
(Not to Scale)
24
23
22
21
20
19
18
17
16
15
14
13
1
2
3
4
5
6
7
8
9
10
11
12
ADF7901
D
GND
NC
TxDATA
FSK3
R
SET
CP
OUT
FSK1
CE
OOK
_
SEL
OSC2
OSC1
RSET_OOK
C
REG1
C
VCO
VCO
IN
DV
DD
RF
GND
RF
OUT
FSK2
DV
DD
PA_EN
C
REG2
D
GND
RSET_FSK
05349-002
Figure 2. Pin Configuration
Table 3. Pin Function Descriptions
Pin No. Mnemonic Function
1 DV
DD
Positive Supply for the Digital Circuitry. This must be 3.0 V. Decoupling capacitors to the analog ground plane
should be placed as close as possible to this pin.
2 C
REG1
A 2.2 μF capacitor should be added at CREG1 to reduce regulator noise and improve stability. A reduced capacitor
improves regulator power-on time but can cause higher spurious.
3 CP
OUT
Charge Pump Output. This output generates current pulses that are integrated in the loop filter. The integrated
current changes the control voltage on the input to the VCO.
4 TxDATA Digital FSK data to be transmitted is inputted on this pin.
5 D
GND
Ground for Digital Section.
6 NC No Connect.
7 D
GND
Ground for Digital Section.
8 OSC1
The reference crystal should be connected between this pin and the OSC2 pin. The necessary crystal load
capacitor should be tied between this pin and ground.
9 OSC2
The reference crystal should be connected between this pin and the OSC1 pin. The necessary crystal load
capacitor should be tied between this pin and ground.
A TCXO or external square wave can also be connected to this pin, with OSC1 left floating. A DC-blocking
capacitor (4.7 nF is adequate) should be placed between the TCXO output and OSC2 pin.
When not using an external regulator, a 1 MΩ resistor can be tied between the OSC2 pin and ground to meet the
power-down current specification of 1 μA.
10 OOK_SEL A high on this pin selects operation in OOK mode at 384 MHz when CE is high.
11 FSK1 FSK Channel Select Pin. This represents the LSB of the channel select pins.
12 FSK2 FSK Channel Select Pin.
13 FSK3 FSK Channel Select Pin.
14 CE Bringing CE low puts the ADF7901 into power-down, drawing <1 μA of current.
15 RSET_OOK
The value of this resistor sets the output power for data = 1 in OOK mode. A resistor of 3.6 kΩ provides the
maximum output power. Increasing the resistor reduces the power and the current consumption. A lower resistor
value than 3.6 kΩ can be used to increase the power to a maximum of 14 dBm. The PA does not operate efficiently
in this mode.
16 RSET_FSK
The value of this resistor sets the output power in FSK mode. A resistor of 3.6 kΩ provides maximum output
power. Increasing the resistor reduces the power and the current consumption. A resistor value lower than 3.6 kΩ
can be used to increase the power to a maximum of 14 dBm. The PA does not operate efficiently in this mode.
17 C
VCO
A 22 nF capacitor should be tied between the C
VCO
and C
REG2
pins. This line should run underneath the ADF7901.
The capacitor is necessary to ensure stable VCO operation.
18 VCO
IN
The tuning voltage on this pin determines the output frequency of the voltage controlled oscillator (VCO).
The higher the tuning voltage the higher the output frequency. The output of the loop filter is connected here.
19 RF
GND
Ground for Output Stage of Transmitter.
20 RF
OUT
The modulated signal is available at this pin. Output power levels are from –5 dBm to +12 dBm. The output
should be impedance matched using suitable components to the desired load.
