© 2005 Fairchild Semiconductor Corporation DS500099 www.fairchildsemi.com
January 1998
Revised June 2005
74VCX16240 Low Voltage 16-Bit Inverting Buffer/Line Driver with 3.6V Tolerant Inputs and Outputs
74VCX16240
Low Voltage 16-Bit Inverting Buffer/Line Driver with
3.6V Tolerant Inputs and Outputs
General Description
The VCX16240 contains sixteen inverting buffers with
3-STATE outputs to be employed as a memory and
address driver, clock driver, or bus oriented transmitter/
receiver. The device is nibble (4-bit) controlled. Each nibble
has separate 3-STATE control inputs which can be shorted
together for full 16-bit operation.
The 74VCX16240 is designed for low voltage (1.2V to
3.6V) V
CC
applications with I/O capability up to 3.6V.
The 74VCX16240 is fabricated with an advanced CMOS
technology to achieve high speed operation while maintain-
ing low CMOS power dissipation.
Features
■ 1.2V to 3.6V V
CC
supply operation
■ 3.6V tolerant inputs and outputs
■ t
PD
2.5 ns max for 3.0V to 3.6V V
CC
■ Power-off high impedance inputs and outputs
■ Supports live insertion and withdrawal (Note 1)
■ Static Drive (I
OH
/I
OL
)
24 mA @ 3.0V V
CC
■ Uses patented noise/EMI reduction circuitry
■ Latch-up performance exceeds 300 mA
■ ESD performance:
Human body model
2000V
Machine model 200V
Note 1: To ensure the high-impedance state during power up or power
down, OE
should be tied to V
CC
through a pull-up resistor; the minimum
value of the resistor is determined by the current-sourcing capability of the
driver.
Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol Pin Descriptions
Order Number Package Number Package Descriptions
74VCX16240MTD MTD48 48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Pin Names Description
OE
n
Output Enable Input (Active LOW)
I
0
–I
15
Inputs
O
0
–O
15
Outputs
