BD3523HFN, BD35230HFN, BD35231HFN
Technical Note
10/20
www.rohm.com
2009.04 - Rev.B
© 2009 ROHM Co., Ltd. All rights reserved.
●Operation of Each Block
・AMP
This is an error amp that compares the reference voltage (0.65V) with V
O to drive the output Nch FET (Ron=150mΩ).
Frequency optimization helps to realize rapid transient response, and to support the use of ceramic capacitors on the output
capacitors. AMP input voltage ranges from GND to 2.7V, while the AMP output ranges from GND to VCC. When EN is OFF,
or when UVLO is active, output goes LOW and the output of the NchFET switches OFF.
・EN
The EN block controls the regulator’s ON/OFF state via the EN logic input pin. In the OFF position, circuit voltage is
maintained at 0μA, thus minimizing current consumption at standby. The FET is switched ON to enable discharge of the
NRCS pin VO, thereby draining the excess charge and preventing the IC on the load side from malfunctioning. Since no
electrical connection is required (e.g. between the VCC pin and the ESD prevention diode), module operation is
independent of the input sequence.
・VCCUVLO
To prevent malfunctions that can occur during a momentary decrease in VCC, the UVLO circuit switches the output OFF,
and (like the EN block) discharges NRCS and VO. Once the UVLO threshold voltage (TYP3.80V) is reached, the power-on
reset is triggered and output continues.
・VINUVLO
When VD voltage exceeds the threshold voltage, VDUVLO becomes active. Once active, the status of output voltage
remains ON even if VD voltage drops. (When VIN voltage drops, SCP engages and output switches OFF.)
Unlike EN and VCC, it is effective at output startup. VDUVLO can be restored either by reconnecting the EN pin or VCC pin.
・CURRENT LIMIT
When output is ON, the current limit function monitors the internal IC output current against the parameter value. When
current exceeds this level, the current limit module lowers the output current to protect the load IC. When the overcurrent
state is eliminated, output voltage is restored to the parameter value. However, when output voltage falls to or below the
SCP startup voltage, the SCP function becomes active and the output switches OFF.
・NRCS (Non Rush Current on Start-up)
The soft start function enabled by connecting an external capacitor between the NRCS pin and ground. Output ramp-up can
be set for any period up to the time the NRCS pin reaches VFB (0.65V). During startup, the NRCS pin serves as a 20μA
(TYP) constant current source to charge the external capacitor. Output start time is calculated via the formula below.
・TSD (Thermal Shut down)
The shutdown (TSD) circuit automatically is latched OFF when the chip temperature exceeds the threshold temperature
after the programmed time period elapses, thus serving to protect the IC against “thermal runaway” and heat damage.
Because the TSD circuit is intended to shut down the IC only in the presence of extreme heat, it is crucial that the Tj (max)
parameter not be exceeded in the thermal design ,in order to avoid potential problems with the TSD.
・VIN
The VIN line acts as the major current supply line, and is connected to the output NchFET drain. Since no electrical
connection (such as between the VCC pin and the ESD protection diode) is necessary, VIN operates independent of the
input sequence. However, since an output NchFET body diode exists between VIN and VO, a VIN-VO electric (diode)
connection is present. Note, therefore, that when output is switched ON or OFF, reverse current may flow to VIN from VO.
・SCP
When output voltage (Vo) drops, the IC assumes that VO pin is shorted to GND and switches the output voltage OFF. After
the GND short has been detected and the programmed delay time has elapsed, output is latched OFF. It is also effective
during output startup. SCP can be cleared either by reconnecting the EN pin or VCC pin. Delay time is calculated via the
formula below.
TNRCS (typ.) =
C
NRCS×VFB
INRCS
TTSD (typ.) =
C
SCP×VSCPTH
20uA
TSCP (typ.) =
CSCP×VSCPTH
I
SCP
