List of figures STM809/810/811/812
4/21 Doc ID 9873 Rev 5
List of figures
Figure 1. Logic diagram (STM809/810) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 2. Logic diagram (STM811/812) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 3. SOT23-3 connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Figure 4. SOT143-4 connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Figure 5. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Figure 6. Hardware hookup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Figure 7. Supply current vs. temperature, L/M/R/S/T (no load) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Figure 8. Power-down reset delay vs. temperature - V
OD
= V
TH
– V
CC
(L/M) . . . . . . . . . . . . . . . . . . . 9
Figure 9. Power-down reset delay vs. temperature - V
OD
= V
TH
– V
CC
(R/S/T) . . . . . . . . . . . . . . . . 10
Figure 10. Power-up t
rec
vs. temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Figure 11. Normalized reset threshold vs. temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Figure 12. Max transient duration NOT causing reset pulse vs. reset comparator overdrive . . . . . . . 11
Figure 13. AC testing input/output waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 14. MR timing waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 15. SOT23-3 – 3-lead small outline transistor package outline . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 16. SOT143-4 – 4-lead small outline transistor package outline . . . . . . . . . . . . . . . . . . . . . . . 17
STM809/810/811/812 Description
Doc ID 9873 Rev 5 5/21
1 Description
The STM809/810/811/812 microprocessor reset circuits are low-power supervisory devices
used to monitor power supplies. They perform a single function: asserting a reset signal
whenever the V
CC
supply voltage drops below a preset value and keeping it asserted until
V
CC
has risen above the preset threshold for a minimum period of time (t
rec
). The
STM811/812 also provide a push-button reset input (MR
).
Figure 1. Logic diagram (STM809/810)
1. For STM810
Figure 2. Logic diagram (STM811/812)
1. For STM812
Table 2. Signal names
V
SS
Ground
RST Active-low reset output
RST
(1)
1. STM810/812 only
Active-high reset output
V
CC
Supply voltage
MR
(2)
2. STM811/812 only
Manual reset input
AI07832
V
CC
STM809/810
V
SS
RST (RST)
(1)
AI07831
V
CC
STM811/812
V
SS
RST (RST)
(1)
MR
Description STM809/810/811/812
6/21 Doc ID 9873 Rev 5
Figure 3. SOT23-3 connections
Figure 4. SOT143-4 connections
Figure 5. Block diagram
1. STM811/812 only
2. RST for STM810/812
Figure 6. Hardware hookup
1. STM809/811 only (RST for STM810/812)
2. STM811/812 only
AI07833
2
3
1
RST (RST)
V
SS
(For STM810)
V
CC
AI07834
2
4
3
1
RST (RST)
V
SS
(For STM812)
V
CC
MR
AI07835
COMPARE
V
RST
V
CC
DEBOUNCE
t
rec
Generator
MR
(1)
RST
(2)
AI07836
V
CC
V
SS
V
CC
MCU
STM809/810/
811/812
RST
(1)
Push-button
RESET
V
CC
MR
(2)
V
SS
RESET
Input

STM812SW16F

Mfr. #:
Manufacturer:
STMicroelectronics
Description:
Supervisory Circuits 2.93V Reset 140ms
Lifecycle:
New from this manufacturer.
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