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U310-E3

P1-P3P4-P6P7-P8
J/SST/U308 Series
Vishay Siliconix
Document Number: 70237
S-50149—Rev. H, 24-Jan-05
www.vishay.com
1
N-Channel JFETs
J308 SST308 U309
J309 SST309 U310
J310 SST310
PRODUCT SUMMARY
Part Number V
GS(off)
(V) V
(BR)GSS
Min (V) g
fs
Min (mS) I
DSS
Min (mA)
J308 −1 to −6.5 −25 8 12
J309 −1 to −4 −25 10
12
J310 −2 to −6.5 −25 8
24
SST308 −1 to −6.5 −25 8 12
SST309 −1 to −4 −25
10 12
SST310 −2 to −6.5 −25 8
24
U309 −1 to −4 −25
10 12
U310 −2.5 to −6 −25
10 24
FEATURES BENEFITS APPLICATIONS
D Excellent High Frequency Gain:
Gps 11.5 dB @ 450 MHz
D Very Low Noise: 2.7 dB @ 450 MHz
D Very Low Distortion
D High ac/dc Switch Off-Isolation
D Wideband High Gain
D Very High System Sensitivity
D High Quality of Amplification
D High-Speed Switching Capability
D High Low-Level Signal Amplification
D High-Frequency Amplifier/Mixer
D Oscillator
D Sample-and-Hold
D Very Low Capacitance Switches
DESCRIPTION
The J/SST/U308 series offers superb amplification characteristics.
Of special interest is its high-frequency performance. Even at 450
MHz, this series offers high power gain at low noise.
Low-cost J series TO-226AA (TO-92) packaging supports
automated assembly with tape-and-reel options. The SST series
TO-236 (SOT-23) package provides surface-mount capabilities
and is available with tape-and-reel options. The U series
hermetically-sealed TO-206AC (TO-52) package supports full
military processing. (See Military and Packaging Information for
further details.)
For similar dual products packaged in the TO-78, see the
U430/431 data sheet.
D
S
G
TO-236
(SOT-23)
2
3
1
TO-226AA
(TO-92)
Top View
J308
J309
J310
D
G
S
1
2
3
Top View
SST308 (Z8)*
SST309 (Z9)*
SST310 (Z0)*
*Marking Code for TO-236
Top View
U309
U310
G and Case
TO-206AC
(TO-52)
D
S
1
23
For applications information see AN104.
J/SST/U308 Series
Vishay Siliconix
www.vishay.com
2
Document Number: 70237
S-50149—Rev. H, 24-Jan-05
ABSOLUTE MAXIMUM RATINGS
Gate-Drain, Gate-Source Voltage −25 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Gate Current : (J/SST Prefixes) 10 mA. . . . . . . . . . . . . . . . . . . .
(U Prefix) 20 mA. . . . . . . . . . . . . . . . . . . . . . . . . .
Lead Temperature (
1
/
16
” from case for 10 sec.) 300_C. . . . . . . . . . . . . . . . . . .
Storage Temperature : (J/SST Prefixes) −55 to 150_C. . . . . . . . . . . . . .
(U Prefix) −65 to 175_C. . . . . . . . . . . . . . . . . . . .
Operating Junction Temperature −55 to 150_C. . . . . . . . . . . . . . . . . . . . . . . . . .
Power Dissipation : (J/SST Prefixes)
a
350 mW. . . . . . . . . . . . . . . . .
(U Prefix)
b
500 mW. . . . . . . . . . . . . . . . . . . . . . .
Notes
a. Derate 2.8 mW/_C above 25_C
b. Derate 4 mW/_C above 25_C
SPECIFICATIONS FOR J/SST308, J/SST309 AND J/SST310 (T
A
= 25_C UNLESS NOTED)
Limits
J/SST308 J/SST309 J/SST310
Parameter Symbol Test Conditions Typ
a
Min Max Min Max Min Max Unit
Static
Gate-Source
Breakdown Voltage
V
(BR)GSS
I
G
= −1 mA , V
DS
= 0 V
−35 −25 −25 −25 V
Gate-Source Cutoff Voltage V
GS(off)
V
DS
= 10 V, I
D
= 1 nA −1
−6.5
−1
−4 −2 −6.5 V
Saturation Drain Current
b
I
DSS
V
DS
= 10 V, V
GS
= 0 V
12 60
12
30
24
60 mA
Gate Reverse Current
I
GSS
V
GS
= −15 V, V
DS
= 0 V −0.002 −1 −1 −1 nA
Gate Reverse Current I
GSS
T
A
= 125_C
−0.001 −1 −1 −1
mA
Gate Operating Current I
G
V
DG
= 9 V, I
D
= 10 mA
−15 pA
Drain-Source On-Resistance r
DS(on)
V
GS
= 0 V, I
D
= 1 mA 35
W
Gate-Source Forward Voltage V
GS(F)
I
G
= 10 mA
V
DS
= 0 V
J 0.7 1 1 1 V
Dynamic
Common-Source
Forward Transconductance
g
fs
V
DS
= 10 V, I
D
= 10 mA
14
8 10 8
mS
Common-Source
Output Conductance
g
os
V
DS
= 10 V
,
I
D
= 10 mA
f = 1 kHz
110
250 250 250
mS
Common-Source
C
i
J 4 5 5 5
Common-Source
Input Capacitance
C
iss
V
DS
= 10 V
V 10 V
SST 4
pF
Common-Source
C
C
rss
DS
V
GS
= −10 V
f = 1 MHz
J 1.9
2.5 2.5 2.5
pF
Common Source
Reverse Transfer Capacitance
C
rss
f = 1 MHz
SST 1.9
Equivalent Input
Noise Voltage
e
n
V
DS
= 10 V, I
D
= 10 mA
f = 100 Hz
6
nV⁄
√Hz
High Frequency
Common-Gate
g
f
f = 105 MHz 14
Common-Gate
Forward Transconductance
g
fg
f = 450 MHz 13
mS
Common-Gate
g
f = 105 MHz 0.16
mS
Common-Gate
Output Conductance
g
og
V
DS
= 10 V
f = 450 MHz 0.55
Common Gate Power Gain
c
G
V
DS
= 10 V
I
D
= 10 mA
f = 105 MHz 16
Common-Gate Power Gain
c
G
pg
f = 450 MHz 11.5
dB
Noise Figure
NF
f = 105 MHz 1.5
dB
N
o
i
se
Fi
gure
NF
f = 450 MHz 2.7
Notes
a. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing. NZB
b. Pulse test: PW v300 ms duty cycle v3%.
c. Gain (G
pg
) measured at optimum input noise match.
J/SST/U308 Series
Vishay Siliconix
Document Number: 70237
S-50149—Rev. H, 24-Jan-05
www.vishay.com
3
SPECIFICATIONS FOR U309 AND U310 (T
A
= 25_C UNLESS NOTED)
Limits
U309 U310
Parameter Symbol Test Conditions Typ
a
Min Max Min Max Unit
Static
Gate-Source Breakdown Voltage V
(BR)GSS
I
G
= −1 mA , V
DS
= 0 V
−35 −25 −25 V
Gate-Source Cutoff Voltage V
GS(off)
V
DS
= 10 V, I
D
= 1 nA −1
−4 −2.5 −6 V
Saturation Drain Current
b
I
DSS
V
DS
= 10 V, V
GS
= 0 V 12 30 24
60 mA
Gate Reverse Current
V
GS
= −15 V, V
DS
= 0 V −0.002
−0.15 −0.15
nA
Gate Reverse Current I
GSS
T
A
= 125_C
−0.001
−0.15 −0.15
mA
Gate Operating Current I
G
V
DG
= 9 V, I
D
= 10 mA
−15 pA
Drain-Source On-Resistance r
DS(on)
V
GS
= 0 V, I
D
= 1 mA 35
W
Gate-Source Forward Voltage V
GS(F)
I
G
= 10 mA , V
DS
= 0 V 0.7
1 1
V
Dynamic
Common-Source
Forward Transconductance
g
fs
V
DS
= 10 V, I
D
= 10 mA
14
10 10
mS
Common-Source
Output Conductance
g
os
V
DS
= 10 V
,
I
D
= 10 mA
f = 1 kHz
110
250 250
mS
Common-Source
Input Capacitance
C
iss
V
DS
= 10 V, V
GS
= −10 V
4 5 5
pF
Common-Source
Reverse Transfer Capacitance
C
rss
V
DS
= 10 V
,
V
GS
= −10 V
f = 1 MHz
1.9
2.5 2.5
pF
Equivalent Input Noise Voltage e
n
V
DS
= 10 V, I
D
= 10 mA
f = 100 Hz
6
nV⁄
√Hz
High Frequency
Common-Gate
f = 105 MHz 14
Common-Gate
Forward Transconductance
g
fg
f = 450 MHz 13
mS
Common-Gate
f = 105 MHz 0.16
mS
Common-Gate
Output Conductance
g
og
V
DS
= 10 V
f = 450 MHz 0.55
Common Gate Power Gain
c,
d
V
DS
= 10 V
I
D
= 10 mA
f = 105 MHz 16
14 14
Common-Gate Power Gain
c,
d
G
pg
f = 450 MHz 11.5
10 10
dB
Noise Figure
d
f = 105 MHz 1.5
2 2
dB
N
o
i
se
Fi
gure
d
f = 450 MHz 2.7
3.5 3.5
Notes
a. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing. NZB
b. Pulse test: PW v300 ms duty cycle v3%.
c. Gain (G
pg
) measured at optimum input noise match.
d. Not a production test.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
P1-P3P4-P6P7-P8

U310-E3

Mfr. #:
Buy U310-E3
Manufacturer:
Vishay Semiconductors
Description:
JFET 450MHz Amp
Lifecycle:
New from this manufacturer.
Delivery:
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