ADP3338
Rev. B | Page 9 of 16
THEORY OF OPERATION
The ADP3338 anyCAP LDO uses a single control loop for
regulation and reference functions. The output voltage is sensed
by a resistive voltage divider, consisting of R1 and R2, which is
varied to provide the available output voltage option. Feedback
is taken from this network by way of a series diode (D1) and a
second resistor divider (R3 and R4) to the input of an amplifier.
A very high gain error amplifier is used to control this loop. The
amplifier is constructed in such a way that equilibrium produces
a large, temperature-proportional input offset voltage that is
repeatable and very well controlled. The temperature-propor-
tional offset voltage is combined with the complementary diode
voltage to form a virtual band gap voltage that is implicit in the
network, although it never appears explicitly in the circuit.
Ultimately, this patented design makes it possible to control the
loop with only one amplifier. This technique also improves the
noise characteristics of the amplifier by providing more flexi-
bility on the trade off of noise sources that leads to a low noise
design.
The R1, R2 divider is chosen in the same ratio as the band gap
voltage to the output voltage. Although the R1, R2 resistor
divider is loaded by Diode D1 and a second divider consisting
of R3 and R4, the values can be chosen to produce a tempera-
ture-stable output. This unique arrangement specifically corrects
for the loading of the divider, thus avoiding the error resulting
from base current loading in conventional circuits.
The patented amplifier controls a new and unique noninverting
driver that drives the pass transistor, Q1. The use of this special
noninverting driver enables the frequency compensation to
include the load capacitor in a pole-splitting arrangement to
achieve reduced sensitivity to the value, type, and ESR of the
load capacitance.
Most LDOs place very strict requirements on the range of ESR
values for the output capacitor because they are difficult to
stabilize due to the uncertainty of load capacitance and resis-
tance. Moreover, the ESR value required to keep conventional
LDOs stable changes depending on load and temperature.
These ESR limitations make designing with LDOs more
difficult because of their unclear specifications and extreme
variations over temperature.
With the ADP3338 anyCAP LDO, this is no longer true. It can
be used with virtually any good quality capacitor, with no
constraint on the minimum ESR. This innovative design
provides circuit stability with just a small 1 µF capacitor on the
output. Additional advantages of the pole-splitting scheme
include superior line noise rejection and very high regulator
gain to achieve excellent line and load regulation. An impressive
±1.4% accuracy is guaranteed over line, load, and temperature.
Additional features of the circuit include current limit and
thermal shutdown.
V
IN
OUT
ADP3338
C1
1
µ
F
C2
1
µ
F
V
OUT
GNDIN
02050-021
Figure 20. Typical Application Circuit
PTAT
V
OS
g
m
NONINVERTING
WIDEBAND
DRIVER
INPUT
Q1
ADP3338
COMPENSATION
CAPACITOR
ATTENUATION
(V
BANDGAP
/V
OUT
)
R1
D1
R2
R3
R4
OUTPUT
PTAT
CURRENT
(a)
GND
C
LOAD
R
LOAD
02050-020
Figure 21. Functional Block Diagram
ADP3338
Rev. B | Page 10 of 16
APPLICATION INFORMATION
CAPACITOR SELECTION
Output Capacitor
The stability and transient response of the LDO is a function of
the output capacitor. The ADP3338 is stable with a wide range
of capacitor values, types, and ESR (anyCAP). A capacitor as
low as 1 µF is the only requirement for stability. A higher ca-
pacitance may be necessary if high output current surges are
anticipated, or if the output capacitor cannot be located near the
output and ground pins. The ADP3338 is stable with extremely
low ESR capacitors (ESR ≈ 0) such as multilayer ceramic capacitors
(MLCC) or OSCON. Note that the effective capacitance of some
capacitor types falls below the minimum over temperature or
with dc voltage.
Input Capacitor
An input bypass capacitor is not strictly required, but is recom-
mended in any application involving long input wires or high
source impedance. Connecting a 1 µF capacitor from the input
to ground reduces the sensitivity of the circuit to PC board
layout and input transients. If a larger output capacitor is
necessary, a larger value input capacitor is recommended.
OUTPUT CURRENT LIMIT
The ADP3338 is short-circuit protected by limiting the pass
transistors base drive current. The maximum output current is
limited to approximately 2 A (see Figure 16).
THERMAL OVERLOAD PROTECTION
The ADP3338 is protected against damage due to excessive
power dissipation by its thermal overload protection circuit.
Thermal protection limits the die temperature to a maximum of
160°C. Under extreme conditions, such as high ambient
temperature and power dissipation where the die temperature
starts to rise above 160°C, the output current is reduced until
the die temperature has dropped to a safe level.
Current and thermal limit protections are intended to protect
the device against accidental overload conditions. For normal
operation, externally limit the power dissipation of the device
so the junction temperature does not exceed 150°C.
CALCULATING POWER DISSIPATION
Device power dissipation is calculated as
P
D
= (V
IN
V
OUT
) × I
LOAD
+ (V
IN
× I
GND
)
Where I
LOAD
and I
GND
are load current and ground current, and
V
IN
and V
OUT
are the input and output voltages, respectively.
Assuming the worst-case operating conditions are I
LOAD
= 1.0 A,
I
GND
= 10 mA, V
IN
= 3.3 V, and V
OUT
= 2.5 V, the device power
dissipation is
P
D
= (3.3 V – 2.5 V) × 1000 mA + (3.3 V × 10 mA) = 833 mW
So, for a junction temperature of 125°C and a maximum
ambient temperature of 85°C, the required thermal resistance
from junction to ambient is
C/W48
W833.0
C85C125
°=
°°
=θ
JA
PRINTED CIRCUIT BOARD LAYOUT
CONSIDERATIONS
The thermal resistance, θ
JA
, of the SOT-223 is determined by the
sum of the junction-to-case and the case-to-ambient thermal
resistances. The junction-to-case thermal resistance, θ
JC
, is
determined by the package design and is specified at 26.8°C/W.
However, the case-to-ambient thermal resistance is determined
by the printed circuit board design.
As shown in Figure 22, the amount of copper to which the
ADP3338 is mounted affects thermal performance. When
mounted to the minimal pads of 2 oz. copper, as shown in
Figure 22 (a), θ
JA
is 126.6°C/W. Adding a small copper pad
under the ADP3338, as shown in Figure 22 (b), reduces the θ
JA
to
102.9°C/W. Increasing the copper pad to one square inch, as
shown in Figure 22 (c), reduces the θ
JA
even further to 52.8°C/W.
02050-022
cab
Figure 22. PCB Layouts
ADP3338
Rev. B | Page 11 of 16
Use the following general guidelines when designing printed
circuit boards:
Keep the output capacitor as close as possible to the output
and ground pins.
Keep the input capacitor as close as possible to the input
and ground pins.
Specify thick copper and use wide traces for optimum heat
transfer. PC board traces with larger cross sectional areas
remove more heat from the ADP3338.
Decrease thermal resistance by adding a copper pad under
the ADP3338, as shown in Figure 22 (b).
Use the adjacent area to the ADP3338 to add more copper
around it. Connecting the copper area to the output of the
ADP3338, as shown in Figure 22 (c), is best, but thermal
performance will be improved even if it is connected to
other signals.
Use additional copper layers or planes to reduce the
thermal resistance. Again, connecting the other layers to
the output of the ADP3338 is best, but is not necessary.
When connecting the output pad to other layers, use
multiple vias.

ADP3338AKCZ-1.5-RL

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Linear Voltage Regulators High Acc Ultralow 1A Quiescent Crnt
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