9
LTC2903-1
29031f a
(LTC2903-D1, LTC2903-E1)
BLOCK DIAGRA S
W
V
CC
1
V1
3
V2
4
V3
5
V4
2
GND
–
+
–
+
–
+
–
+
RESET DELAY GENERATOR
200ms
DELAY
LOW VOLTAGE
PULL-DOWN
BANDGAP
REFERENCE
V1
V2
V3
V4
D1
3.3V
ADJ
ADJ
ADJ
E1
5V
ADJ
ADJ
ADJ
MONITORED VOLTAGES
V1
V1
RST
10µA
6
29031 BD2
POWER
DETECT
V1
0.5V
APPLICATIO S I FOR ATIO
WUUU
Power-Up
The LTC2903-1 issues a logic low on the RST output when
an input supply voltage resides below the prescribed
threshold voltage. Ideally, the RST logic output would
remain low with the input supply voltage down to zero
volts. Most supervisors lack pull-down capability below
1V. The LTC2903-1 power supply supervisors incorporate
a new low voltage pull-down circuit that can hold the RST
line low with as little as 200mV of input supply voltage on
V1, V2 or V3 (V1 only for options D1 and E1). The pull-down
circuit helps maintain a low impedance path to ground,
reducing the risk of floating the RST node to undetermined
voltages. Such voltages may trigger external logic causing
erroneous reset operation(s). Furthermore, a mid-scale
voltage could cause external circuits to operate in the
middle of their voltage transfer characteristic, consuming
more quiescent current than normal. These conditions
could cause serious system reliability problems.
When V1, V2 and V3 are ramped simultaneously (for
options A1, B1 and C1 only), the reset pull-down current
increases up to three times the current that may be pulled
with a single input. Figure 1 demonstrates the reset pin
V
CC
(V)
10
I
RST
(µA)
1000
10000
0 0.8 1.2
29031 F01
1
0.40.2 1.00.6
100
V1 = V2 = V3 V1 ONLY
T
A
= 25°C
V
RST
= 0.3V
CC
Figure 1. RST Pull-Down Current vs V
CC
