12
LTC2903-1
29031f a
APPLICATIO S I FOR ATIO
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The powered system must work reliably down to the
lowest voltage in the threshold band or risk malfunction
before the reset line falls. In the 5V example, using the
1.5% accurate supervisor, the system ICs must work
down to 4.35V. System ICs working with a ±2.5% accurate
supervisor must operate down to 4.25V, increasing the
required system voltage margin and the probability of
system malfunction.
In any supervisory application, supply noise riding on the
monitored DC voltage can cause spurious resets, particu-
larly when the monitored voltage approaches the reset
threshold. A less than desirable but commonly used
technique used to mitigate this problem adds hysteresis to
the input comparator. The amount of added hysteresis,
usually specified as a percentage of the trip threshold,
effectively degrades the advertised accuracy of the part.
To maintain high accuracy, the LTC2903-1 does not use
hysteresis.
To minimize spurious resets while maintaining threshold
accuracy, the LTC2903-1 employs two forms of noise
filtering. The first line of defense incorporates proprietary
tailoring of the comparator transient response. Transient
events receive electronic integration in the comparator
and must exceed a certain magnitude and duration to
cause the comparator to switch. Figure 5 illustrates the
typical transient duration versus comparator overdrive
(as a percentage of the trip threshold V
RT
) required to trip
the comparators. Once any comparator is switched, the
reset line pulls low. The reset time-out counter starts once
all inputs return above threshold. The nominal reset delay
time is 200ms. The counter clears whenever any input
drops back below threshold. This reset delay time effec-
tively provides further filtering of the voltage inputs. A
noisy input with frequency components of sufficient mag-
nitude above f = 1/t
RST
= 5Hz holds the reset line low,
preventing oscillatory behavior on the reset line.
Although all four comparators have built-in glitch filtering,
use bypass capacitors on the V1 and V2 inputs because
the greater of V1 or V2 supplies the V
CC
(options A1, B1
and C1) for the part (a 0.1µF ceramic capacitor satisfies
most applications). Apply filter capacitors on the V3 and
V4 inputs in extremely noisy situations. Options D1 and E1
require a bypass capacitor only on V1. Apply filter capaci-
tors on V2, V3 and V4 adjustable inputs in extremely noisy
situations.
Reset Output Rise and Fall Time Estimation
The reset output line contains a weak pull-up current
source to the V2 supply (V1 for options D1 and E1). Use
an external pull-up resistor when the output needs to pull
to another voltage and/or when the reset output needs a
faster rise time. The open-drain output allows for wired-
OR connections when more than one signal needs to pull
down on the reset line. Estimate output rise time for the
open-drain output without an external pull-up using:
t
RISE
≈ 2.2 • R
PU
• C
LOAD
where R
PU
is the on-resistance of the pull-up transistor
and C
LOAD
is the external load capacitance on the pin. At
room temperature, the average R
PU
is approximately
50kΩ. When externally pulling up to voltages higher than
V2 (V1 for options D1 and E1), an internal network
automatically protects the weak pull-up circuitry from
reverse currents.
The reset output has very strong pull-down capability.
Estimate the output fall time using:
t
FALL
≈ 2.2 • R
PD
• C
LOAD
where R
PD
is the on-resistance of the pull-down transistor
and C
LOAD
is the external load capacitance on the pin. At
room temperature, the average R
PD
is approximately 40Ω.
With a 150pF load capacitance the reset line can pull down
in about 13ns.
Figure 5. Typical Transient Duration vs Overdrive
Required to Trip Comparator
RESET COMPARATOR OVERDRIVE (% OF V
RTX
)
0.1
250
TYPICAL TRANSIENT DURATION (µs)
300
350
400
1 10 100
29031 F05
200
150
50
0
100
RESET OCCURS
ABOVE CURVE
T
A
= 25°C
