74AUP2GU04 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 5 — 11 October 2013 6 of 19
NXP Semiconductors
74AUP2GU04
Low-power dual unbuffered inverter
11. Dynamic characteristics
V
OL
LOW-level output voltage V
I
= GND or V
CC
I
O
= 20 A; V
CC
= 0.8 V to 3.6 V - - 0.11 V
I
O
= 1.1 mA; V
CC
= 1.1 V - - 0.33 V
CC
V
I
O
= 1.7 mA; V
CC
= 1.4 V - - 0.41 V
I
O
= 1.9 mA; V
CC
= 1.65 V - - 0.39 V
I
O
= 2.3 mA; V
CC
= 2.3 V - - 0.36 V
I
O
= 3.1 mA; V
CC
= 2.3 V - - 0.50 V
I
O
= 2.7 mA; V
CC
= 3.0 V - - 0.36 V
I
O
= 4.0 mA; V
CC
= 3.0 V - - 0.50 V
I
I
input leakage current V
I
= GND to 3.6 V; V
CC
= 0 V to 3.6 V - - 0.75 A
I
CC
supply current V
I
= GND or V
CC
; I
O
= 0 A;
V
CC
= 0.8 V to 3.6 V
--1.4A
Table 7. Static characteristics
…continued
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions Min Typ Max Unit
Table 8. Dynamic characteristics
Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 8.
Symbol Parameter Conditions 25 C 40 C to +125 C Unit
Min Typ
[1]
Max Min Max
(85 C)
Max
(125 C)
C
L
= 5 pF
t
pd
propagation delay nA to nY; see Figure 7
[2]
V
CC
= 0.8 V - 6.2 - - - - ns
V
CC
= 1.1 V to 1.3 V 0.9 2.3 4.4 0.9 4.8 5.3 ns
V
CC
= 1.4 V to 1.6 V 0.7 1.7 3.1 0.6 3.4 3.8 ns
V
CC
= 1.65 V to 1.95 V 0.5 1.4 2.6 0.5 2.9 3.2 ns
V
CC
= 2.3 V to 2.7 V 0.4 1.1 2.0 0.4 2.3 2.6 ns
V
CC
= 3.0 V to 3.6 V 0.3 1.0 1.8 0.3 2.1 2.4 ns
C
L
= 10 pF
t
pd
propagation delay nA to nY; see Figure 7
[2]
V
CC
= 0.8 V - 9.6 - - - - ns
V
CC
= 1.1 V to 1.3 V 1.2 3.1 6.1 1.2 6.8 7.5 ns
V
CC
= 1.4 V to 1.6 V 1.0 2.3 4.0 0.9 4.6 5.1 ns
V
CC
= 1.65 V to 1.95 V 0.8 1.9 3.3 0.7 3.8 4.2 ns
V
CC
= 2.3 V to 2.7 V 0.6 1.5 2.7 0.6 3.1 3.5 ns
V
CC
= 3.0 V to 3.6 V 0.5 1.3 2.4 0.5 2.7 3.0 ns
74AUP2GU04 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 5 — 11 October 2013 7 of 19
NXP Semiconductors
74AUP2GU04
Low-power dual unbuffered inverter
[1] All typical values are measured at nominal V
CC
.
[2] t
pd
is the same as t
PLH
and t
PHL
.
[3] All specified values are the average typical values over all stated loads.
[4] C
PD
is used to determine the dynamic power dissipation (P
D
in W).
P
D
=C
PD
V
CC
2
f
i
N+(C
L
V
CC
2
f
o
) where:
f
i
= input frequency in MHz;
f
o
= output frequency in MHz;
C
L
= load capacitance in pF;
V
CC
= supply voltage in V;
N = number of inputs switching;
(C
L
V
CC
2
f
o
) = sum of the outputs.
C
L
= 15 pF
t
pd
propagation delay nA to nY; see Figure 7
[2]
V
CC
= 0.8 V - 13.0 - - - - ns
V
CC
= 1.1 V to 1.3 V 1.6 3.8 7.9 1.4 8.8 9.7 ns
V
CC
= 1.4 V to 1.6 V 1.3 2.8 4.9 1.1 5.7 6.3 ns
V
CC
= 1.65 V to 1.95 V 1.0 2.3 4.0 0.9 4.7 5.2 ns
V
CC
= 2.3 V to 2.7 V 0.8 1.9 3.2 0.8 3.7 4.1 ns
V
CC
= 3.0 V to 3.6 V 0.7 1.6 2.9 0.7 3.3 3.7 ns
C
L
= 30 pF
t
pd
propagation delay nA to nY; see Figure 7
[2]
V
CC
= 0.8 V - 23.2 - - - - ns
V
CC
= 1.1 V to 1.3 V 2.4 6.0 13.1 2.2 14.8 16.3 ns
V
CC
= 1.4 V to 1.6 V 2.0 4.2 7.6 1.8 9.0 9.9 ns
V
CC
= 1.65 V to 1.95 V 1.7 3.6 6.1 1.5 7.2 8.0 ns
V
CC
= 2.3 V to 2.7 V 1.4 2.9 4.8 1.3 5.7 6.3 ns
V
CC
= 3.0 V to 3.6 V 1.2 2.5 4.3 1.1 5.1 5.7 ns
C
L
= 5 pF, 10 pF, 15 pF and 30 pF
C
PD
power dissipation
capacitance
f
i
= 1 MHz; V
I
= GND to V
CC
[3]
[4]
V
CC
= 0.8 V - 1.1 - - - - pF
V
CC
= 1.1 V to 1.3 V - 1.1 - - - - pF
V
CC
= 1.4 V to 1.6 V - 1.3 - - - - pF
V
CC
= 1.65 V to 1.95 V - 1.5 - - - - pF
V
CC
= 2.3 V to 2.7 V - 3.0 - - - - pF
V
CC
= 3.0 V to 3.6 V - 4.5 - - - - pF
Table 8. Dynamic characteristics
…continued
Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 8.
Symbol Parameter Conditions 25 C 40 C to +125 C Unit
Min Typ
[1]
Max Min Max
(85 C)
Max
(125 C)
74AUP2GU04 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 5 — 11 October 2013 8 of 19
NXP Semiconductors
74AUP2GU04
Low-power dual unbuffered inverter
12. Waveforms
[1] For measuring enable and disable times R
L
= 5 k, for measuring propagation delays, set-up and hold times and pulse width
R
L
=1M.
Measurement points are given in Table 9
.
Logic levels: V
OL
and V
OH
are typical output voltage drops that occur with the output load.
Fig 7. The data input (nA) to output (nY) propagation delays
mna344
t
PHL
t
PLH
V
M
V
M
V
M
V
M
nA input
nY output
GND
V
I
V
OH
V
OL
Table 9. Measurement points
Supply voltage Output Input
V
CC
V
M
V
M
V
I
t
r
= t
f
0.8 V to 3.6 V 0.5 V
CC
0.5 V
CC
V
CC
3.0 ns
Test data is given in Table 10.
Definitions for test circuit:
R
L
= Load resistance.
C
L
= Load capacitance including jig and probe capacitance.
R
T
= Termination resistance should be equal to the output impedance Z
o
of the pulse generator.
V
EXT
= External voltage for measuring switching times.
Fig 8. Test circuit for measuring switching times
001aac521
DUT
R
T
V
I
V
O
V
EXT
V
CC
R
L
5 kΩ
C
L
G
Table 10. Test data
Supply voltage Load V
EXT
V
CC
C
L
R
L
[1]
t
PLH
, t
PHL
t
PZH
, t
PHZ
t
PZL
, t
PLZ
0.8 V to 3.6 V 5 pF, 10 pF, 15 pF and 30 pF 5 k or 1 M open GND 2 V
CC

74AUP2GU04GW,125

Mfr. #:
Manufacturer:
Nexperia
Description:
Inverters DUAL UNBUFF INVERTER 1.8V
Lifecycle:
New from this manufacturer.
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