4
FN6071.1
March 15, 2005
Three-State (high impedance)
Receiver Output Current
I
OZR
0.4V V
O
2.4V Full -1 - 1 µA
Receiver Input Resistance R
IN
-7V V
CM
12V Full 12 19 - k
No-Load Supply Current (Note 3) I
CC
DI = 0V or V
CC
DE = V
CC
,
RE
= 0V
or V
CC
Full - 0.75 1.2 mA
DE = 0V,
RE
= 0V
Full - 0.65 1 mA
Shutdown Supply Current I
SHDN
DE = 0V, RE = V
CC
, DI = 0V or V
CC
Full - 15 100 nA
Driver Short-Circuit Current,
V
O
= High or Low
I
OSD1
DE = V
CC
, -7V V
Y
or V
Z
12V (Note 4) Full - - 250 mA
Receiver Short-Circuit Current I
OSR
0V V
O
V
CC
Full 8 - 60 mA
DRIVER SWITCHING CHARACTERISTICS
Maximum Data Rate f
MAX
(Figure 2A) Full 30 50 - Mbps
Driver Differential Output Delay t
DD
R
DIFF
= 60, C
L
= 15pF (Figure 2A) Full 3 10 25 ns
Driver Differential Rise or Fall Time t
R
, t
F
R
DIFF
= 60, C
L
= 15pF (Figure 2A) Full 3 6 12 ns
Driver Input to Output Delay t
PLH
, t
PHL
R
L
= 27, C
L
= 15pF (Figure 2C) Full 6 10 22 ns
Driver Output Skew t
SKEW
R
L
= 27, C
L
= 15pF (Figure 2C) Full - 1 5 ns
Driver Enable to Output High t
ZH
R
L
= 110, C
L
= 50pF, SW = GND (Figure 3),
(Note 5)
Full - 45 90 ns
Driver Enable to Output Low t
ZL
R
L
= 110, C
L
= 50pF, SW = V
CC
(Figure 3),
(Note 5)
Full - 45 90 ns
Driver Disable from Output High t
HZ
R
L
= 110, C
L
= 50pF, SW = GND (Figure 3) Full - 60 90 ns
Driver Disable from Output Low t
LZ
R
L
= 110, C
L
= 50pF, SW = V
CC
(Figure 3) Full - 70 100 ns
Driver Enable from Shutdown to
Output High
t
ZH(SHDN)
R
L
= 110, C
L
= 50pF, SW = GND (Figure 3),
(Notes 7, 8)
Full - 115 150 ns
Driver Enable from Shutdown to
Output Low
t
ZL(SHDN)
R
L
= 110, C
L
= 50pF, SW = V
CC
(Figure 3),
(Notes 7, 8)
Full - 115 150 ns
RECEIVER SWITCHING CHARACTERISTICS
Maximum Data Rate f
MAX
V
ID
1.5V with t
r
/t
f
= 10ns, RO t
H
& t
L
60% t
UI
(Figure 4)
Full 27 35 - Mbps
Receiver Input to Output Delay t
PLH
, t
PHL
(Figure 4) Full 25 45 80 ns
Receiver Skew | t
PLH
- t
PHL
|t
SKD
(Figure 4) Full - 2 12 ns
Receiver Enable to Output High t
ZH
R
L
= 1k, C
L
= 15pF, SW = GND (Figure 5),
(Note 6)
Full - 11 25 ns
Receiver Enable to Output Low t
ZL
R
L
= 1k, C
L
= 15pF, SW = V
CC
(Figure 5),
(Note 6)
Full - 11 25 ns
Receiver Disable from Output High t
HZ
R
L
= 1k, C
L
= 15pF, SW = GND (Figure 5) Full - 7 20 ns
Receiver Disable from Output Low t
LZ
R
L
= 1k, C
L
= 15pF, SW = V
CC
(Figure 5) Full - 7 20 ns
Electrical Specifications Test Conditions: V
CC
= 3V to 3.6V; Unless Otherwise Specified. Typicals are at V
CC
= 3.3V, T
A
= 25°C,
Note 2 (Continued)
PARAMETER SYMBOL TEST CONDITIONS
TEMP
(°C) MIN TYP MAX UNITS
ISL43485
5
FN6071.1
March 15, 2005
Time to Shutdown t
SHDN
(Note 7) Full 80 190 300 ns
Receiver Enable from Shutdown to
Output High
t
ZH(SHDN)
R
L
= 1k, C
L
= 15pF, SW = GND (Figure 5),
(Notes 7, 9)
Full - 240 400 ns
Receiver Enable from Shutdown to
Output Low
t
ZL(SHDN)
R
L
= 1k, C
L
= 15pF, SW = V
CC
(Figure 5),
(Notes 7, 9)
Full - 240 400 ns
NOTES:
2. All currents into device pins are positive; all currents out of device pins are negative. All voltages are referenced to device ground unless
otherwise specified.
3. Supply current specification is valid for loaded drivers when DE = 0V.
4. Applies to peak current. See “Typical Performance Curves” for more information.
5. When testing this parameter, keep RE
= 0 to prevent the device from entering SHDN.
6. When testing this parameter, the RE
signal high time must be short enough (typically <100ns) to prevent the device from entering SHDN.
7. The ISL43485 is put into shutdown by bringing RE
high and DE low. If the inputs are in this state for less than 80ns, the parts are guaranteed
not to enter shutdown. If the inputs are in this state for at least 300ns, the parts are guaranteed to have entered shutdown. See “Low-Power
Shutdown Mode” section.
8. Keep RE
= VCC, and set the DE signal low time >300ns to ensure that the device enters SHDN.
9. Set the RE
signal high time >300ns to ensure that the device enters SHDN.
Test Circuits and Waveforms
FIGURE 1A. V
OD
AND V
OC
FIGURE 1B. V
OD
WITH COMMON MODE LOAD
FIGURE 1. DC DRIVER TEST CIRCUITS
Electrical Specifications Test Conditions: V
CC
= 3V to 3.6V; Unless Otherwise Specified. Typicals are at V
CC
= 3.3V, T
A
= 25°C,
Note 2 (Continued)
PARAMETER SYMBOL TEST CONDITIONS
TEMP
(°C) MIN TYP MAX UNITS
D
DE
DI
V
CC
V
OD
V
OC
R
L
/2
R
L
/2
Z
Y
D
DE
DI
V
CC
V
OD
375
375
Z
Y
R
L
= 60
V
CM
-7V TO +12V
ISL43485
6
FN6071.1
March 15, 2005
FIGURE 2A. DIFFERENTIAL TEST CIRCUIT
FIGURE 2B. MEASUREMENT POINTS
FIGURE 2C. SINGLE ENDED TEST CIRCUIT
FIGURE 2. DRIVER DATA RATE, PROPAGATION DELAY AND DIFFERENTIAL TRANSITION TIMES
FIGURE 3A. TEST CIRCUIT
FIGURE 3B. MEASUREMENT POINTS
FIGURE 3. DRIVER ENABLE AND DISABLE TIMES
Test Circuits and Waveforms (Continued)
D
DE
DI
3V
SIGNAL
GENERATOR
C
L
= 15pF
R
DIFF
= 60
Z
Y
C
L
= 15pF
OUT (Y)
3V
0V
t
PLH
1.5V1.5V
V
OH
V
OL
50% 50%
t
PHL
OUT (Z)
t
PHL
V
OH
V
OL
50% 50%
t
PLH
DIFF OUT (Y - Z)
t
R
+V
OD
-V
OD
90% 90%
t
F
10% 10%
DI
t
DD
50%
t
DD
50%
SKEW = |t
PLH
(Y or Z) - t
PHL
(Z OR Y)|
t
r
, t
f
= 4.5ns
D
DE
DI
3V
SIGNAL
GENERATOR
Z
Y
C
L
= 15pF
R
L
= 27
V
OM
OUT
V
OH
+ V
OL
2
1.5VV
OM
=
D
DE
DI
Z
Y
V
CC
GND
SW
PARAMETER OUTPUT RE DI SW
t
HZ
Y/Z X 1/0 GND
t
LZ
Y/Z X 0/1 V
CC
t
ZH
Y/Z 0 (Note 5) 1/0 GND
t
ZL
Y/Z 0 (Note 5) 0/1 V
CC
t
ZH(SHDN)
Y/Z 1 (Note 8) 1/0 GND
t
ZL(SHDN)
Y/Z 1 (Note 8) 0/1 V
CC
SIGNAL
GENERATOR
110
C
L
= 50pF
OUT (Y, Z)
3V
0V
1.5V1.5V
V
OH
0V
V
OH
- 0.25V
t
HZ
OUT (Y, Z)
V
CC
V
OL
V
OL
+ 0.25V
t
LZ
DE
OUTPUT HIGH
OUTPUT LOW
t
ZL
, t
ZL(SHDN)
t
ZH
, t
ZH(SHDN)
NOTE 7
50%
50%
NOTE 7
NOTE 7
ISL43485

ISL43485IBZ

Mfr. #:
Manufacturer:
Renesas / Intersil
Description:
RS-422/RS-485 Interface IC HI SPD 8LD -40+85 3V RS-485 TRANS 1T
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

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