IRU1260
4
Rev. 2.1
09/19/02
www.irf.com
Introduction
The IRU1260 is a dual adjustable Low Dropout (LDO)
regulator which can easily be programmed with the ad-
dition of two external resistors to any voltages within
the range of 1.20 to 5.5V. This voltage regulator is de-
signed specifically for applications that require two sepa-
rate regulators such as the Intel Pentium II
TM
proces-
sors requiring 1.5V and 2.5V supplies, eliminating the
need for a second regulator which results in lower over-
all system cost. When VCTRL pin is connected to a sup-
ply which is at least 1V higher than VIN, the dropout
voltage improves by 30% which makes it ideal for appli-
cations requiring less than the standard 1.3V dropout
given in the LDO products such as IRU10XX series. The
IRU1260 also provides an accurate 1.20V voltage refer-
ence common to both regulators for programming each
output voltage. Other features of the device include: fast
response to sudden load current changes, such as GTL+
termination application for Pentium II
TM
family of micro-
processors. The IRU1260 also includes thermal shut-
down protection to protect the device if an overload con-
dition occurs.
Output Voltage Setting
The IRU1260 can be programmed to any voltages in the
range of 1.20V to 5.5V with the addition of R1 and R2
external resistors according to the following formula:
Figure 3 - Typical application of the IRU1260
for programming the output voltage.
(Only one output is shown here)
V
OUT
R2
R1
V
IN
V
CTRL
VREF
IB
IRU1260
Gnd
VOUT
VCTRL
VIN
VFB
R2
R1
V
IN
V
CTRL
RL
RP
PARASITIC LINE
RESISTANCE
IRU1260
Gnd
VOUT
V CTRL
V IN
VFB
Where:
VREF = 1.20V Typically
IB = 0.02mA Typical
R1 and R2 as shown in Figure 3:
VOUT = VREF3 +R23IB
R2
R1
( )
1+
The IRU1260 keeps a constant 1.2V between the VFB
pin and ground pin. By placing a resistor R1 across these
two pins a constant current flows through R1, adding to
the IFB current and into the R2 resistor producing a volt-
age equal to the (1.2/R1)3R2 + IFB3R2 which will be
added to the 1.2V to set the output voltage as shown in
the above equation. Since the input bias current of the
amplifier (IFB) is only 0.02mA typically, it adds a very
small error to the output voltage and for most applica-
tions can be ignored. For example, in a typical 1.5V
GTL+application if R1=10.2KV and R2=2.55KV the er-
ror due to the IADJ is only 0.05mV which is less than
0.004% of the nominal set point. The effective input im-
pedance seen by the feedback pins (The parallel combi-
nation of R1 and R2) must always be higher than 1.8KV
in order for the regulator to start up properly.
Load Regulation
Since the IRU1260 does not provide a separate ground
pin for the reference voltage, it is not possible to provide
true remote sensing of the output voltage at the load.
Figure 4 shows that the best load regulation is achieved
when the bottom side of R1 resistor is connected di-
rectly to the ground pin of IRU1260 (preferably to the tab
of the device) and the top side of R2 resistor is con-
nected to the load. In fact, if R1 is connected to the load
side, the effective resistance between the regulator and
the load is gained up by the factor of (1+R2/R1), or the
effective resistance will be, RP(eff)=RP3(1+R2/R1). It is
important to note that for high current applications, this
can represent a significant percentage of the overall load
regulation and one must keep the path from the regula-
tor to the load as short as possible to minimize this
effect.
Figure 4 - Schematic showing connection
for best load regulation.
(Only one output is shown here)
APPLICATION INFORMATION
IRU1260
5
Rev. 2.1
09/19/02
www.irf.com
Stability
The IRU1260 requires the use of an output capacitor as
part of the frequency compensation in order to make the
regulator stable. Typical designs for the microprocessor
applications use standard electrolytic capacitors with
typical ESR in the range of 50 to 100mV and the output
capacitance of 500 to 1000mF. Fortunately as the ca-
pacitance increases, the ESR decreases resulting in a
fixed RC time constant. The IRU1260 takes advantage
of this phenomena in making the overall regulator loop
stable. For most applications a minimum of 100mF alu-
minum electrolytic capacitor with the maximum ESR of
0.3V such as Sanyo, MVGX series, Panasonic FA se-
ries as well as the Nichicon PL series insures both sta-
bility and good transient response. The IRU1260 also
requires a 1mF ceramic capacitor connected from VIN to
VCTRL and a 10V, 0.1W resistor in series with VCTRL pin
in order to further insure stability.
Thermal Design
The IRU1260 incorporates an internal thermal shutdown
that protects the device when the junction temperature
exceeds the maximum allowable junction temperature.
Although this device can operate with junction tempera-
tures in the range of 1508C, it is recommended that the
selected heat sink be chosen such that during maxi-
mum continuous load operation the junction tempera-
ture is kept below this number. The example given shows
the steps in selecting the proper regulator heat sink for
driving the Pentium II
TM
processor GTL+ termination
resistors and the Clock IC using the IRU1260 TO-263
package.
Example:
Assuming the following specifications:
The steps for selecting a proper heat sink to keep the
junction temperature below 1358C is given as:
1) Calculate the maximum power dissipation using:
2) Assuming a TO-263 surface mount package, the junc-
tion to ambient thermal resistance of the package is:
3) The maximum junction temperature of the device is
calculated using the equation below:
Since this is lower than our selected 1358C maxi-
mum junction temperature (1508C is the thermal shut-
down of the device), TO-263 package is a suitable
package for our application.
VIN = 3.3V
VOUT1 = 2.5V
VOUT2 = 1.5V
IOUT1(MAX) = 0.2A
IOUT2(MAX) = 1.5A
TA = 358C
PD = IOUT13(VIN - VOUT1) + IOUT23(VIN - VOUT2)
PD = 0.23(3.3 - 2.5) + 1.53(3.3 - 1.5) = 2.86W
uJA = 308C/W for 1" square pad area
TJ = TA + PD3uJA
TJ = 35 + 2.86330 = 1218C
IRU1260
6
Rev. 2.1
09/19/02
www.irf.com
Layout Consideration
The IRU1260 like all other high speed linear regulators
need to be properly laid out to insure stable operation.
The most important component is the output capacitor,
which needs to be placed close to the output pin and
connected to this pin using a plane connection with a
low inductance path.
IRU1260 in Ultra LDO, Single Output Application
The IRU1260 can also be used in single supply applica-
tions where the difference between input and output is
much lower than the standard 1.5V dropout that is ob-
tainable with standard LDO devices. The schematic in
Figure 7 shows the application of the IRU1260 in a single
supply with the second LDO being disabled.
In this application, the IRU1260 is used on the VGA
card to convert 3.3V supply to 2.7V to power the Intel
740 chip rather than the conventional LDO which due to
its 1.5V minimum dropout spec must use the 5V supply
to achieve the same result. The difference is a substan-
tial decrease in the power dissipation as shown below.
The maximum power dissipation of the Intel 740 chip is
5.8W, which at 2.7V results in:
a) Using standard LDO, the power dissipated in the de-
vice is:
Using surface mount TO-263 package with 258C/W
junction to air thermal resistance results in:
This is very close to the thermal shutdown of the IC.
b) Using IRU1260, the power dissipated in the device is
drastically reduced by using 3.3V supply instead of
5V.
Using surface mount TO-263 package with 258C/W
junction to air thermal resistance results in:
A reduction of 918C in junction temperature.
Io = = 2.15A
5.8
2.7
PD = (VIN - Vo)3Io = (5 - 2.7)32.15 = 4.94W
TJ = PD3uJA + TA = 4.94325 + 25 = 1488C
PD = (VIN - Vo)3Io = (3.3 - 2.7)32.15 = 1.3W
TJ = PD3uJA + TA = 1.3325 + 25 = 578C

IRU1260CMTR

Mfr. #:
Manufacturer:
Infineon Technologies
Description:
IC REG CONV PENTIUM 2OUT TO263-7
Lifecycle:
New from this manufacturer.
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