4
FN9030.8
March 10, 2006
Absolute Maximum Ratings Thermal Information
Supply Voltage, V
CC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +15.0V
Boot Voltage, V
BOOT
- V
PHASE
. . . . . . . . . . . . . . . . . . . . . . +15.0V
Input, Output or I/O Voltage . . . . . . . . . . . . GND -0.3V to V
CC
+0.3V
ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 2
Recommended Operating Conditions
Supply Voltage, V
CC
. . . . . . . . . . . . . . . . . . . . . . . . . . . +12V ±10%
Ambient Temperature Range, ISL6522C . . . . . . . . . . . . 0°C to 70°C
Ambient Temperature Range, ISL6522I. . . . . . . . . . . .-40°C to 85°C
Junction Temperature Range, ISL6522C. . . . . . . . . . . C to 125°C
Junction Temperature Range, ISL6522I . . . . . . . . . .-40°C to 125°C
Thermal Resistance (Typical, Note 1) θ
JA
(°C/W) θ
JC
(°C/W)
SOIC Package (Note 1) . . . . . . . . . . . . 67 n/a
TSSOP Package (Note 1) . . . . . . . . . . 95 n/a
QFN Package (Notes 2, 3). . . . . . . . . . 36 5
Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . 150°C
Maximum Storage Temperature Range . . . . . . . . . . . -65°C to 150°C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300°C
(SOIC - Lead Tips Only)
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
1. θ
JA
is measured with the component mounted on a highs effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
2. θ
JA
is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. SeeTech
Brief TB379.
3. For θ
JC
, the "case temp" location is the center of the exposed metal pad on the package underside.
Electrical Specifications Recommended Operating Conditions, Unless Otherwise Noted
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
V
CC
SUPPLY CURRENT
Nominal Supply I
CC
EN = V
CC
; UGATE and LGATE Open - 5 - mA
Shutdown Supply EN = 0V - 50 100 µA
POWER-ON RESET
Rising V
CC
Threshold V
OCSET
= 4.5VDC - - 10.4 V
Falling V
CC
Threshold V
OCSET
= 4.5VDC 8.1 - - V
Enable-Input Threshold Voltage ISL6522C, V
OCSET
= 4.5VDC 0.8 - 2.0 V
ISL6522I, V
OCSET
= 4.5VDC 0.8 - 2.1 V
Rising V
OCSET
Threshold -1.27- V
OSCILLATOR
Free Running Frequency ISL6522C, R
T
= OPEN, V
CC
= 12 175 200 230 kHz
ISL6522I, R
T
= OPEN, V
CC
= 12 160 200 230
Total Variation 6k < R
T
to GND < 200k -20 - +20 %
Ramp Amplitude V
OSC
R
T
= OPEN - 1.9 - V
P-P
REFERENCE
Reference Voltage Tolerance V
REF
Commercial -1 - 1 %
Industrial -2 - +1 %
Reference Voltage -0.800- V
ERROR AMPLIFIER
DC Gain -88- dB
Gain-Bandwidth Product GBW - 15 - MHz
Slew Rate SR COMP = 10pF - 6 - V/µs
GATE DRIVERS
Upper Gate Source I
UGATE
V
BOOT
- V
PHASE
= 12V, V
UGATE
= 6V 350 500 - mA
ISL6522
5
FN9030.8
March 10, 2006
Functional Pin Descriptions
RT
This pin provides oscillator switching frequency adjustment.
By placing a resistor (R
T
) from this pin to GND, the nominal
200kHz switching frequency is increased according to the
following equation:
Conversely, connecting a pull-up resistor (R
T
) from this pin
to V
CC
reduces the switching frequency according to the
following equation:
Upper Gate Sink R
UGATE
ISL6522C, I
LGATE
= 0.3A - 5.5 10
ISL6522I, I
LGATE
= 0.3A - 5.5 7.2
Lower Gate Source I
LGATE
V
CC
= 12V, V
LGATE
= 6V 300 450 - mA
Lower Gate Sink R
LGATE
ISL6522C, I
LGATE
= 0.3A - 3.5 6.5
ISL6522I, I
LGATE
= 0.3A - 3.5 4.5
PROTECTION
OCSET Current Source I
OCSET
V
OCSET
= 4.5VDC 170 200 230 µA
Soft-Start Current I
SS
-10- µA
Electrical Specifications Recommended Operating Conditions, Unless Otherwise Noted (Continued)
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
Typical Performance Curves
FIGURE 1. R
T
RESISTANCE vs FREQUENCY FIGURE 2. BIAS SUPPLY CURRENT vs FREQUENCY
10 100 1000
SWITCHING FREQUENCY (kHz)
RESISTANCE (k)
10
100
1000
R
T
PULLUP
TO +12V
R
T
PULLDOWN
TO V
SS
100 200 300 400 500 600 700 800 900 1000
80
70
60
50
40
30
20
10
0
I
VCC
(mA)
SWITCHING FREQUENCY (kHz)
C
GATE
= 1000pF
C
GATE
= 3300pF
C
GATE
= 10pF
8
9
10
11
12
13
14
7
6
5
4
3
2
1
OCSET
SS
EN
COMP
FB
RT
VCC
LGATE
PGND
BOOT
UGATE
PHASE
GND
PVCC
SOIC
and
TSSOP
QFN
1
3
4
15
SS
COMP
FB
EN
NC
OCSET
RT
VCC
16 14 13
2
12
10
9
11
6578
PVCC
LGATE
PGND
BOOT
NC
GND
PHASE
UGATE
GND
Fs 200kHz
510
6
R
T
------------------+
(R
T
to GND)
Fs 200kHz
410
7
R
T
------------------
(R
T
to 12V)
ISL6522
6
FN9030.8
March 10, 2006
OCSET
Connect a resistor (R
OCSET
) from this pin to the drain of the
upper MOSFET. R
OCSET
, an internal 200µA current source
(I
OCS
), and the upper MOSFET on-resistance (r
DS(ON)
) set
the converter overcurrent (OC) trip point according to the
following equation:
An overcurrent trip cycles the soft-start function.
SS
Connect a capacitor from this pin to ground. This capacitor,
along with an internal 10µA current source, sets the soft-start
interval of the converter.
COMP and FB
COMP and FB are the available external pins of the error
amplifier. The FB pin is the inverting input of the error
amplifier and the COMP pin is the error amplifier output.
These pins are used to compensate the voltage-control
feedback loop of the converter.
EN
This pin is the open-collector enable pin. Pull this pin below
1V to disable the converter. In shutdown, the soft-start pin is
discharged and the UGATE and LGATE pins are held low.
GND
Signal ground for the IC. All voltage levels are measured
with respect to this pin.
PHASE
Connect the PHASE pin to the upper MOSFET source. This
pin is used to monitor the voltage drop across the MOSFET
for overcurrent protection. This pin also provides the return
path for the upper gate drive.
UGATE
Connect UGATE to the upper MOSFET gate. This pin
provides the gate drive for the upper MOSFET. This pin is also
monitored by the adaptive shoot through protection circuitry to
determine when the upper MOSFET has turned off.
BOOT
This pin provides bias voltage to the upper MOSFET driver.
A bootstrap circuit may be used to create a BOOT voltage
suitable to drive a standard N-Channel MOSFET.
PGND
This is the power ground connection. Tie the lower MOSFET
source to this pin.
LGATE
Connect LGATE to the lower MOSFET gate. This pin provides
the gate drive for the lower MOSFET. This pin is also
monitored by the adaptive shoot through protection circuitry to
determine when the lower MOSFET has turned off.
PVCC
Provide a bias supply for the lower gate drive to this pin.
VCC
Provide a 12V bias supply for the chip to this pin.
Functional Description
Initialization
The ISL6522 automatically initializes upon receipt of power.
Special sequencing of the input supplies is not necessary.
The Power-On Reset (POR) function continually monitors
the input supply voltages and the enable (EN) pin. The POR
monitors the bias voltage at the VCC pin and the input
voltage (V
IN
) on the OCSET pin. The level on OCSET is
equal to V
IN
Less a fixed voltage drop (see overcurrent
protection). With the EN pin held to V
CC
, the POR function
initiates soft-start operation after both input supply voltages
exceed their POR thresholds. For operation with a single
+12V power source, V
IN
and V
CC
are equivalent and the
+12V power source must exceed the rising V
CC
threshold
before POR initiates operation.
The POR function inhibits operation with the chip disabled
(EN pin low). With both input supplies above their POR
thresholds, transitioning the EN pin high initiates a soft-start
interval.
Soft-Start
The POR function initiates the soft-start sequence. An internal
10µA current source charges an external capacitor (C
SS
) on
the SS pin to 4V. Soft-start clamps the error amplifier output
(COMP pin) to the SS pin voltage. Figure 3 shows the soft-
start interval. At t
1
in Figure 3, the SS and COMP voltages
reach the valley of the oscillator’s triangle wave. The
oscillator’s triangular waveform is compared to the ramping
error amplifier voltage. This generates PHASE pulses of
increasing width that charge the output capacitor(s). This
interval of increasing pulse width continues to t2, at which
point the output is in regulation and the clamp on the COMP
pin is released. This method provides a rapid and controlled
output voltage rise.
I
PEAK
I
OCS
R
OCSET
r
DS ON()
--------------------------------------------=
ISL6522

ISL6522CBZ-T

Mfr. #:
Manufacturer:
Renesas / Intersil
Description:
Switching Controllers PWM CNTRLR DDRG 14LD N
Lifecycle:
New from this manufacturer.
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