Schematic diagram TS512, TS512A
4/18 DocID004948 Rev 6
2 Schematic diagram
Figure 1. Schematic diagram (1/2 TS512)
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DocID004948 Rev 6 5/18
TS512, TS512A Electrical characteristics
18
3 Electrical characteristics
Table 3. V
CC
= ±15 V, T
amb
= 25 °C (unless otherwise specified)
Symbol Parameter Min. Typ. Max. Unit
I
CC
Supply current (per channel)
T
min
T
amb
T
max
0.5 0.6
0.75
mA
I
ib
Input bias current
T
min
T
amb
T
max
50 150
300
nA
R
in
Input resistance, f = 1 kHz 1 M
V
io
Input offset voltage
TS512
TS512A
T
min
T
amb
T
max
TS512
TS512A
0.5 2.5
0.5
3.5
1.5
mV
V
io
Input offset voltage drift
T
min
T
amb
T
max
2 μV/°C
I
io
Input offset current
T
min
T
amb
T
max
520
40
nA
I
io
Input offset current drift
T
min
T
amb
T
max
0.08 nA/°C
I
os
Output short-circuit current 23 mA
A
vd
Large signal voltage gain
R
L
= 2 kV
CC
= ±15 V, T
min
T
amb
T
max
V
CC
= ± 4 V
90
100
95
dB
GBP Gain bandwidth product, f = 100 kHz 1.8 3 MHz
e
n
Equivalent input noise voltage, f = 1 kHz
Rs = 50
Rs = 1 k
Rs = 10 k
8
10
18
THD
Total harmonic distortion
Av = 20 dB, R
L
= 2 k
V
o
= 2 V
pp
, f = 1 kHz
0.03
%
±V
opp
Output voltage swing
R
L
= 2 kV
CC
= ±15 V, T
min
T
amb
T
max
V
CC
= ± 4 V
±13
±3
V
V
opp
Large signal voltage swing
R
L
= 10 kf = 10 kHz
28 V
pp
SR
Slew rate
Unity gain, R
L
= 2 k
0.8 1.5 V/μs
CMR
Common mode rejection ratio
CMR = 20 log (V
ic/
V
io)
(V
ic
= -10 V to 10 V, Vout = V
CC
/2, R
L
> 1 M
)
90 dB
nV
Hz
-----------
Electrical characteristics TS512, TS512A
6/18 DocID004948 Rev 6
SVR
Supply voltage rejection ratio
20 log (V
CC
/V
io
)
(V
CC
= ±4 V to ±15 V, V
out
= V
icm
= V
CC
/2)
90 dB
V
o1
/V
o2
Channel separation, f = 1 kHz 120 dB
Table 3. V
CC
= ±15 V, T
amb
= 25 °C (unless otherwise specified) (continued)
Symbol Parameter Min. Typ. Max. Unit

TS512BIYDT

Mfr. #:
Manufacturer:
STMicroelectronics
Description:
Precision Amplifiers Low noise & distortion (8nV/sqrtHz & 0.03%)
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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