74VHCT373A Octal D-Type Latch with 3-STATE Outputs
May 2007
©1997 Fairchild Semiconductor Corporation www.fairchildsemi.com
74VHCT373A Rev. 1.3
74VHCT373A
Octal D-Type Latch with 3-STATE Outputs
Features
■
High speed: t
PD
=
7.7ns (Typ.) at T
A
=
25°C
■
High Noise Immunity: V
IH
=
2.0V, V
IL
=
0.8V
■
Power Down Protection is provided on all inputs and
outputs
■
Low Power Dissipation: I
CC
=
4µA (Max.) @ T
A
=
25°C
■
Pin and Function Compatible with 74HCT373
General Description
The VHCT373A is an advanced high speed CMOS octal
D-type latch with 3-STATE output fabricated with silicon
gate CMOS technology. It achieves the high speed oper-
ation similar to equivalent Bipolar Schottky TTL while
maintaining the CMOS low power dissipation. This 8-bit
D-type latch is controlled by a latch enable input (LE)
and an output enable input (OE
). The latches appear
transparent to data when latch enable (LE) is HIGH.
When LE is LOW, the data that meets the setup time is
latched. When the OE
input is HIGH, the eight outputs
are in a high impedance state.
Protection circuits ensure that 0V to 7V can be applied to
the input and output
(1)
pins without regard to the supply
voltage. This device can be used to interface 3V to 5V
systems and two supply systems such as battery back
up. This circuit prevents device destruction due to mis-
matched supply and input voltages.
Note:
1. Outputs in OFF-State
Ordering Information
Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter “X” to the
ordering number. Pb-Free package per JEDEC J-STD-020B.
Order Number
Package
Number Package Description
74VHCT373AM M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
74VHCT373ASJ M20D 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74VHCT373AMTC MTC20 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153,
4.4mm Wide
