MAX2420EAI+T Datasheet MAX2463EAI+T, MAX2420EAI+T, MAX2460EAI+T | P10-P12

MAX2420/MAX2421/MAX2422/MAX2460/MAX2463

900MHz Image-Reject Transceivers

10 ______________________________________________________________________________________

Detailed Description

The following sections describe each of the functional

blocks shown in the Functional Diagram.

Receiver

The MAX2420/MAX2421/MAX2422/MAX2460/MAX2463’s

receive path consists of a 900MHz low-noise amplifier,

an image-reject mixer, and an IF buffer amplifier.

The LNA’s gain and biasing are adjustable through the

LNAGAIN pin. Proper operation of this pin can provide

optimum performance over a wide range of signal lev-

els. The LNA can be placed in four modes by applying

a DC voltage on the LNAGAIN pin. See Table 1, as well

as the relevant Typical Operating Characteristics plots.

At low LNAGAIN voltages, the LNA is shut off, and the

input signal capacitively couples directly into the mixer

to provide maximum linearity for large-signal operation

(receiver close to transmitter). As the LNAGAIN voltage

is raised, the LNA begins to turn on. Between 0.5V and

1V at LNAGAIN, the LNA is partially biased and

behaves like a Class C amplifier. Avoid this operating

mode for applications where linearity is a concern. As

the LNAGAIN voltage reaches 1V, the LNA is fully

biased into Class A mode, and the gain is monotonical-

ly adjustable at LNAGAIN voltages above 1V. See the

Receiver Gain, Receiver IP3, and Receiver Noise

Figure vs. LNAGAIN plots in the Typical Operating

Characteristics for more information.

The downconverter is implemented using an image-

reject mixer consisting of an input buffer with two out-

puts, each of which is fed to a double-balanced mixer.

The local-oscillator (LO) port of each mixer is driven

from a quadrature LO. The LO is generated from an on-

chip oscillator and an external tank circuit. Its signal is

buffered and split into phase shifters, which provide

90° of phase shift across their outputs. This pair of LO

signals is fed to the mixers. The mixers’ outputs are

then passed through a second pair of phase shifters,

which provide a 90° phase shift across their outputs. The

resulting mixer outputs are then summed together. The

final phase relationship is such that the desired signal is

reinforced and the image signal is canceled. The down-

converter mixer output appears on the RXOUT pin, a sin-

gle-ended 330Ω output.

Transmitter

The transmitter operates similarly to the receiver, but

with the phase shifters at the mixer inputs. The transmit-

ter consists of an input buffer amplifier with more than

36dB of gain-adjustment range via the TXGAIN pin.

This buffer’s output is split internally into an in-phase (I)

and a quadrature-phase (Q) path. IF phase-shifting net-

works give the Q-channel path a 90° phase shift with

respect to the I channel. The I and Q signals are input

to a pair of double-balanced mixers, driven with quad-

rature LO. The mixer outputs are then summed, cancel-

ing the image component. The image-rejected output

signal is fed to the PA predriver, which outputs typically

-3dBm on the TXOUT pin.

Since the transmit and receive sections share an LO

and an IF frequency, interference results if both sec-

tions are active at the same time.

Phase Shifters

MAX2420/MAX2421/MAX2422/MAX2460/MAX2463

devices use passive networks to provide quadrature

phase shifting for the receive IF, transmit IF, and LO

signals. Because these networks are frequency selec-

tive, proper part selection is important. Image rejection

degrades as the IF and RF move away from the

designed optimum frequencies. The MAX2420/

MAX2421/MAX2422’s phase shifters are arranged such

that the LO frequency is higher than the RF carrier fre-

quency (high-side injection), while the MAX2460/

MAX2463’s phase shifters are arranged such that the

LO frequency is lower than the RF carrier frequency

(low-side injection). Refer to the Selector Guide.

Local Oscillator (LO)

The on-chip LO is formed by an emitter-coupled differ-

ential pair. An external LC resonant tank sets the oscil-

lation frequency. A varactor diode is typically used to

create a voltage-controlled oscillator (VCO). See the

Applications Information section for an example VCO

tank circuit.

The LO may be overdriven in applications where an

external signal is available. The external LO signal

should be about 0dBm from 50Ω, and should be AC

coupled into either the TANK or TANK pin. Both TANK

and TANK require pull-up resistors to V

. See the

Applications Information section for details.

LNA partially biased. Avoid this mode—

the LNA operates in a Class C manner

LNA capacitively bypassed, minimum

gain, maximum IP3

MODE

LNA at maximum gain (remains monotonic)

LNA gain is monotonically adjustable

1.5 < V ≤ V

1.0 < V ≤ 1.5

0.5 < V < 1.0

0 < V ≤ 0.5

LNAGAIN

VOLTAGE (V)

Table 1. LNA Modes

MAX2420/MAX2421/MAX2422/MAX2460/MAX2463

900MHz Image-Reject Transceivers

______________________________________________________________________________________ 11

The local oscillator is resistant to LO pulling caused by

changes in load impedance that occur as the part is

switched from standby mode, with just the oscillator run-

ning to either transmit or receive mode. The amount of

LO pulling is affected if there is power at the RXIN port in

transmit mode. The most common cause of this is imper-

fect isolation in an external transmit/receive (T/R) switch.

The AC Electrical Characteristics table contains specifi-

cations for this case as well.

Prescaler

The on-chip prescaler can be used in two different

modes: as a dual-modulus divide-by-64/65, or as oscil-

lator buffer amplifier. The DIV1 pin controls this func-

tion. When DIV1 is low, the prescaler is in dual-modulus

divide-by-64/65 mode; when it is high, the prescaler is

disabled and the oscillator buffer amplifier is enabled.

The buffer typically outputs -8dBm into a 50Ω load. To

minimize shutdown supply current, pull the DIV1 pin

low when in shutdown mode.

In divide-by-64/65 mode, the division ratio is controlled

by the MOD pin. When MOD is high, the prescaler is in

divide-by-64 mode; when it is low, it divides the LO fre-

quency by 65. The DIV1 pin must be at a logic low in

this mode.

To disable the prescaler entirely, leave PREGND and

PREOUT floating. Also tie the MOD and DIV1 pins to

GND. Disabling the prescaler does not affect operation

of the VCO stage.

Power Management

MAX2420/MAX2421/MAX2422/MAX2460/MAX2463 sup-

ports four different power-management features to con-

serve battery life. The VCO section has its own control

pin (VCOON), which also serves as a master bias pin.

When VCOON is high, the LO, quadrature LO phase

shifters, and prescaler or LO buffer are all enabled. The

VCO can be powered up prior to either transmitting or

receiving, to allow it to stabilize. For transmit-to-receive

switching, the receiver and transmitter sections have

their own enable control inputs, RXON and TXON. With

VCOON high, bringing RXON high enables the receive

path, which consists of the LNA, image-reject mixers,

and IF output buffer. When this pin is low, the receive

path is inactive. The TXON input enables the IF

adjustable-gain amplifier, upconverter mixer, and PA

predriver. VCOON must be high for the transmitter to

operate. When TXON is low, the transmitter is off.

To disable all chip functions and reduce the supply

current to typically less than 0.5µA, pull VCOON, DIV1,

MOD, RXON, and TXON low.

Applications Information

Oscillator Tank

The on-chip oscillator requires a parallel-resonant tank

circuit connected across TANK and TANK. Figure 2

shows an example of an oscillator tank circuit. Inductor

L4 provides DC bias to the tank ports. Inductor L3,

capacitor C26, and the series combination of capaci-

tors C2, C3, and both halves of the varactor diode

capacitance set the resonant frequency as follows:

where C

is the capacitance of one varactor diode.

Choose tank components according to your application

needs, such as phase-noise requirements, tuning

range, and VCO gain. High-Q inductors such as air-

core micro springs yield low phase noise. Use a low tol-

erance inductor (L3) for predictable oscillation

frequency. Resistors R6 and R7 can be chosen from 0

to 20Ω to reduce the Q of parasitic resonance due to

series package inductance (L

). Keep R6 and R7 as

small as possible to minimize phase noise, yet large

enough to ensure oscillator start up in fundamental

mode. Oscillator start-up is most critical with high tun-

ing bandwidth (low tank Q) and high temperature.

Capacitors C2 and C3 couple in the varactor. Light

C =

C26

EFF













f =

2L3C

EFF

()













MAX2420

MAX2421

MAX2422

MAX2460

MAX2463

C26

100nH

1kΩ

D1 = ALPHA SMV1299-004

SEE FIGURE 1 FOR R6, R7, C2, C3, C26, AND L3 COMPONENT VALUES.

1/2 D1

47pF

VCO_CTRL

47kΩ

Figure 2. Oscillator Tank Schematic, Using the On-Chip VCO

MAX2420/MAX2421/MAX2422/MAX2460/MAX2463

900MHz Image-Reject Transceivers

12 ______________________________________________________________________________________

coupling of the varactor is a way to reduce the effects

of high-varactor tolerance and increase loaded Q. For a

wider tuning range use larger values for C2 and C3 or a

varactor with a large capacitance ratio. Capacitor C26

is used to trim the tank oscillator frequency. Larger val-

ues for C26 helps negate the effect of stray PCB

capacitance and parasitic inductor capacitance (L3).

Choose a low-tolerance capacitor for C26.

For applications that require a wide tuning range and

low phase noise, a series coupled resonant tank may

be required as shown in Figure 4. This tank uses the

package inductance in series with inductors L1, L2,

and capacitance of varactor D1 to set the net equiva-

lent inductance which resonates in parallel with the

internal oscillator capacitance. Inductors L1 and L2 can

be implemented as microstrip inductors, saving com-

ponent cost. Bias is provided to the tank port through

chokes L3 and L5. R1 and R3 should be chosen large

enough to de-Q the parasitic resonance due to L3 and

L5, but small enough to minimize the voltage drop

across them due to bias current. Values for R1 and R3

should be kept between 0 and 50Ω. Proper high-fre-

quency bypassing (C1) should be used for the bias

voltage to eliminate power supply noise from entering

the tank.

Oscillator-Tank PC Board Layout

The parasitic PC board capacitance, as well as PCB

trace inductance and package inductance, can affect

oscillation frequency, so be careful in laying out the PC

board for the oscillator tank. Keep the tank layout as

symmetrical, tightly packed, and close to the device as

possible to minimize LO feedthrough. When using a PC

board with a ground plane, a cut-out in the ground

plane (and any other planes) below the oscillator tank

reduces parasitic capacitance.

Using an External Oscillator

If an external 50Ω LO signal source is available, it can

be used as an input to the TANK or TANK pin in place

of the on-chip oscillator (Figure 3). The oscillator signal

is AC coupled into the TANK pin and has a level of

about 0dBm from a 50Ω source. For proper biasing of

the oscillator input stage, the TANK and TANK pins

must be pulled up to the V

supply via 50Ω resistors.

If the application requires overdriving the internal oscil-

lator, the pull-up resistors can be increased in order to

save power. If a differential LO source such as the

MAX2620 is available, AC couple the inverting output

into TANK.

MAX2420

MAX2421

MAX2422

MAX2460

MAX2463

TANK

50Ω

EXT LO

EXTERNAL LO LEVEL IS

0dBm FROM A 50Ω

SOURCE.

BLOCK

0.01µF

TANK

Figure 3. Using an External Local Oscillator

MAX2420

MAX2421

MAX2422

MAX2460

MAX2463

TANK

L1L

C1C2

TUNE

TANK

Figure 4. Series Coupled Resonant Tank for Wide Tuning Range and Low Phase Noise

P1-P3 P4-P6 P7-P9 P10-P12 P13-P14

MAX2420EAI+T

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