KXPC823VR81B2T

4
MPC823 Mobile Computing Microprocessor
MOTOROLA
Serial Interface with the Time-Slot Assigner
Allows Serial Communication Controllers and Serial Management Controllers To Be
Used in Multiplexed and/or Nonmultiplexed Operation
Supports T1, CEPT, PCM Highway, ISDN Basic Rate, ISDN Primary Rate,
User-Defined
1- or 8-Bit Resolution
Allows Independent Transmit and Receive Routing, Frame Syncs, and Clocking
Allows Dynamic Changes
Can Be Internally Connected to Four Serial Channels
General-Purpose Timers
Four 16-Bit Timers or Two 32-Bit Timers
Gate Mode Can Enable/Disable Counting
Interrupt Can Be Masked on Reference Match and Event Capture
Interrupts
Seven External Interrupt Request (IRQ) Lines
One Nonmaskable Interrupt
Twelve Port Pins with Interrupt Capability
Ten Internal Interrupt Sources
Programmable Highest Priority Request
Memory Controller (Eight Banks)
Can be Programmed to Support Almost any Memory Interface
Each Bank Can Be a Chip-Select or RAS
to Support a DRAM Bank
A Maximum of 30 Wait States per Memory Bank Can Be Programmed
Glueless Interface to DRAM Single In-Line Memory Modules, Static RAM,
Electrically Programmable Read-Only Memory, Flash EPROM, or Synchronous
DRAM
Four CAS Lines, Four WE Lines, and One OE Line
Boot Chip-Select Available at Reset (Options for 8-, 16-, or 32-Bit Memory)
Variable Block Sizes—32K to 256M
Selectable Write Protection
On-Chip Bus Arbitration Supports External Bus Master
Special Features for Burst Mode Support
System Integration Unit
Hardware Bus Monitor
Spurious Interrupt Monitor
Software Watchdog Timer
Periodic Interrupt Timer
Low-Power Stop Mode
Clock Synthesizer
PowerPC Decrementer and Timebase
Real-Time Clock
Reset Controller
IEEE 1149.1 Test Access Port (JTAG)
Frees
cale Semiconductor,
I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
nc...
MOTOROLA
MPC823 Mobile Computing Microprocessor
5
Video/LCD Controller
Video Controller
Supports Digital NTSC/PAL Video Encoders and Digital TFT
Sequential RGB, 4:4:4, and 4:2:2 YC
r
C
b
(CCIR 601) Digital Component
Video Formats
CCIR-656 Compatible 8-Bit Interface Port
Horizontal Sync, Vertical Sync, Field and Blanking Timing
Generation with Half-Clock Resolution and Programmable Polarity
Supports Interlace/Noninterlace Scanning Methods
Programmable Display Active Area
Programmable Background Color for Inactive Area
Glueless Interface for Most Digital Video Encoders
Hardware Horizontal Scrolling
Uses Burst Read DMA Cycles for Maximum Bus Performance
Panel Voltage Control Adjustments for Contrast Set with On-Chip Timers
End-of-Frame Interrupt Generation
LCD Controller
Supports Digital TFT and Passive LCD Panels
Horizontal Sync, Vertical Sync, Field and Blanking Timing
Generation with Half-Clock Resolution and Programmable Polarity
1-, 2-, or 4-Bit Per Pixel Grayscale Mode Using Advanced Frame Rate Control
Algorithm
Four or Eight Bits Per Pixel Color Mode
4-, 8-, 9-, or 12-Bit Parallel Output to LCD Displays
Programmable Display Active Area
Non-Split or Vertically-Split Screen Support
Uses Burst Read DMA Cycles for Maximum Bus Performance
End of Frame Interrupt Generation
Data for Splits—2+2 or 4+4 Parallel Bits (x+x Refers to x Bits Each for Lower and
Upper Screens in Parallel)
Built-In Color RAM with 256 12-Bit Entries
Programmable Wait Time Between Lines and Frames
Panel Voltage Control Adjustments for Contrast Set with On-Chip Timers
Programmable Polarity for All LCD Interface Signals
Single-Socket PCMCIA-ATA Interface
Master Interface, Release 2.1 Compliant
Single PCMCIA Socket
Eight Memory or I/O Windows Available
Eight General-Purpose I/O Pins and Two General-Purpose Output-Only Pins are
Available When the PCMCIA Controller Is Not in Operation
Frees
cale Semiconductor,
I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
nc...
6
MPC823 Mobile Computing Microprocessor
MOTOROLA
Low-Power Support Modes
Normal High–All Units Are Fully Powered at High Clock Frequency
Normal Low–All Units Are Fully Powered at Low Clock Frequency
Doze–Core Functional Units Are Disabled, Except Timebase, Decrementer, PLL,
Memory Controller, Real-Time Clock, LCD, and Communication Processor Module.
Sleep–All Units Are Disabled, Except Real-Time Clock, Periodic Interrupt Timer,
Timebase, and Decrementer. PLL Is Active for Fast Wake-Up.
Deep Sleep–All Units Are Disabled Including PLL, But Not the Real-Time Clock and
Periodic Interrupt Timer, Timebase, and Decrementer.
Power-Down—All Units Are Disabled Including PLL, But Not the Real-Time Clock
and Periodic Interrupt Timer, Timebase, and Decrementer. Saves More Power Than
Other Modes. The State of Certain Registers May Be Preserved.
Can Be Dynamically Shifted Between High-Frequency and Low-Frequency Operation
Development Capabilities and Interface
Program Flow Tracking
Instruction Show Cycle
Data Show Cycle
Branching
Exception Traps
Watchpoints and Breakpoints
Four Hardware Breakpoints
Five Watchpoint Sources
Simple Hardware Interface
High-Speed Data Transfer
Internal Status Pins
Freeze Indication
Rich Control Register Set
3.3V Operation with 5V TTL Compatibility for the General-Purpose I/O Port Pins and
3.3V for All Others
256-Pin Plastic Ball Grid Array (BGA) Packaging
Frees
cale Semiconductor,
I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
nc...

KXPC823VR81B2T

Mfr. #:
Manufacturer:
NXP Semiconductors
Description:
IC MPU MPC8XX 81MHZ 256BGA MPC8xx
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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