NCP5208DR2G

NCP5208
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7
DETAILED OPERATING DESCRIPTIONS
General
The NCP5208 is a linear regulator with both sink and
source current capabilities used for active termination of
fast switching logic, DDR−I/II SDRAM terminations and
active buses termination of SSTL−2/3 logic. This device
can be operated from a single supply voltage as low as 1.7
V. For DDR−I applications, the device is capable of
sourcing and sinking current up to 1.5 A with output
voltage regulated to within ±3%. The separate voltage
remote feedback pin ensures superior load and line
regulation with fast tracking capability.
Protective features include Soft−Start, Source/Sink
Current Limits and internal Thermal Shutdown.
Additionally, an open−drain VTT OK output signal (POK)
is provided for system monitoring. The shutdown pin (SD)
can be used to tri−state the regulator output for Suspend To
RAM (STR) state. This device is available in a low profile,
space saving SOIC−8 package.
Supply Voltage Inputs
For added flexibility, separate input pins are provided for
each required supply input. AVIN is the device operating
voltage, VDDQ is used to generate the internal reference
for VTT output voltage control and PVIN is the power rail
for the linear regulator. The device will regulate the output
voltage, VTT, with respect to the internal voltage reference
generated from VDDQ input and track the VDDQ changes
closely. The separate PVIN pin allows the designer to
isolate the high current PVIN line changes from coupling
into the noise sensitive AVIN and VDDQ inputs. Since the
AVIN supplies the control to the output power MOSFETs,
PVIN should always be lower than or equal to AVIN.
Generation of Internal Reference Voltage
The prime function of a termination regulator is to
provide a termination voltage, VTT at its output, which can
track the mid−point of the logic voltage level closely, i.e.
½(VDDQ). The VTT voltage is used to terminate the bus
resistors. The NCP5208 generates a precise reference
voltage internally with a built in dead−band to avoid upper
and lower MOSFET shoot through.
Remote Voltage Feedback Sensing
The NCP5208 has a separate feedback pin to monitor the
output voltage at the remote point. With this capability, the
output voltage can be controlled precisely at the output
capacitor so that any noise and fluctuations along the power
path can be eliminated.
Termination Voltage Output Regulation
The NCP5208 includes a simple linear series regulator
with a pair of control error amplifiers, which takes care of
the current source and sink operations separately. The error
amplifiers control a pair of MOSFETs to maintain the
output voltage equal to the internal reference voltage for
both current sink and source conditions. In order to avoid
the MOSFETs turning on at the same time, a dead−band is
implemented internally for safe operation.
Regulator Shutdown Function
The operation of the NCP5208 can be suspended by
pulling the Shutdown (SD) pin to ground. When the device
is stopped, the regulator output will be tri−stated for
Suspend To RAM (STR) state in PC applications. The
shutdown pin is internally pulled high by a small current
source, if this feature is not used, this pin can be left open.
VTT Power OK for System Monitoring
NCP5208 provides an additional VTT power OK signal
for system monitoring. The VTT Power OK (POK) pin
goes low when the VTT voltage is in regulation and has
settled within the allowed window. For memory
termination applications, the system can check this pin to
ensure the termination voltage quality before accessing the
memory. The POK output is connected to a open−drain
switching FET and the designer is free to pull this pin to any
logic voltage level externally. When the VTT output is in
regulation, the internal FET is turned on and pulls the
power OK pin to ground.
Over−current Protection for Sink and Source Operation
In order to provide protection for the internal power
MOSFETs, bi−directional current limit protection circuits
are implemented. Current limit levels are internally set at
2.1 A typical for current source and 2.0 A typical for current
sink at 2.5 V operation.
Thermal Shutdown with Hysteresis
To guarantee safe operation, NCP5208 provides on−chip
thermal shutdown protection. When the chip junction
temperature exceeds 135_C typical, the part will
shutdown. When the junction temperature falls back to
105_C typical, the device resumes normal operation.
NCP5208
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8
APPLICATIONS INFORMATION
Typical Application Circuit
The NCP5208 is a highly integrated termination
regulator. For most applications, an input and output
capacitor and a pullup resistor for the power OK output, are
the only external components needed. For typical
application circuit, refer to Figure 1.
AVIN and VDDQ Supply
AVIN provides power for the device to operate. This
voltage must be kept clean and free from transients. A small
capacitor, 1.0 F is recommended at this input to provide
the required supply filtering and ripple rejection. VDDQ is
primarily used to generate the internal voltage reference, so
any noise or transient at this pin will be directly reflected
at the VTT output. In order to avoid undesired interference
injected into this pin, appropriate de−coupling and careful
design of PCB layout is required.
Input Capacitor Selection
The NCP5208 does not require an input capacitor for
stability, however it is still recommended for better overall
performance during large load transients that can cause
sudden drop of the power rail voltage. The input capacitor
must be located as close as possible to the PVIN pin to
avoid a transient voltage dip affecting the quality of AVIN
and VDDQ. For typical DDR−I applications, a low ESR
electrolytic capacitor of 100 F or larger is recommended.
By adding a small ceramic capacitor of 0.1 F in parallel,
the best high frequency transient filtering will result. If the
device is located near the main supply bulk capacitors, the
input capacitance can be reduced accordingly.
Output Capacitor Selection
The NCP5208 is internally compensated and stable for any
output capacitor with capacitance greater than 220 F and
with ESR ranging from 2 m to 400 m The choice for this
output capacitor is determined solely by the application and
the requirements for load transient characteristic of VTT
output. As a general recommendation, the capacitance should
be larger than 220 F with low ESR for SSTL and DDR
memory applications.
Thermal Dissipation
The NCP5208 is a linear regulator, any current flow
from/to VTT will result in internal power dissipation and
generating heat. In order to prevent un−wanted shutdown
of the device during operation, care should be taken to
de−rate the power capability according to the maximum
expected ambient temperature and power dissipation. The
maximum allowable internal temperature rise, T
R−MAX
can be calculated from the equation in below:
T
R−MAX
+ T
J−MAX
* T
A−MAX
Where T
J−MAX
is the maximum allowable junction
temperature and T
A−MAX
is the maximum expected
ambient temperature.
The maximum allowable power dissipation for a specific
condition is given by:
P
D−MAX
+
T
R−MAX
R
JA_T
Where P
D−MAX
is the maximum allowable power
dissipation and R
JA_T
is Junction−to−Air thermal
resistance for specific package.
The thermal handling capability depends on several
variables. Increasing the thickness and area of the copper
and adding vias and airflow can improve the thermal
performance.
NCP5208
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9
PACKAGE DIMENSIONS
SOIC−8 NB
CASE 751−07
ISSUE AH
SEATING
PLANE
1
4
58
N
J
X 45
_
K
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
6. 751−01 THRU 751−06 ARE OBSOLETE. NEW
STANDARD IS 751−07.
A
B
S
D
H
C
0.10 (0.004)
DIM
A
MIN MAX MIN MAX
INCHES
4.80 5.00 0.189 0.197
MILLIMETERS
B 3.80 4.00 0.150 0.157
C 1.35 1.75 0.053 0.069
D 0.33 0.51 0.013 0.020
G 1.27 BSC 0.050 BSC
H 0.10 0.25 0.004 0.010
J 0.19 0.25 0.007 0.010
K 0.40 1.27 0.016 0.050
M 0 8 0 8
N 0.25 0.50 0.010 0.020
S 5.80 6.20 0.228 0.244
−X−
−Y−
G
M
Y
M
0.25 (0.010)
−Z−
Y
M
0.25 (0.010) Z
S
X
S
M
____
1.52
0.060
7.0
0.275
0.6
0.024
1.270
0.050
4.0
0.155
ǒ
mm
inches
Ǔ
SCALE 6:1
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
SOLDERING FOOTPRINT*
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Phone: 81−3−5773−3850
NCP5208/D
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NCP5208DR2G

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
Linear Voltage Regulators DDR-I/II Termination
Lifecycle:
New from this manufacturer.
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