LT3476
7
3476fb
Layout Hints
The high speed operation of the LT3476 demands careful
attention to board layout. Several items are worthy of note.
The exposed pad of the package is the only GND terminal
of the IC and is also important to thermal management
for the IC, so it is crucial to achieve a good electrical and
thermal contact between the exposed pad and the ground
plane of the board. Also, the Schottky rectifier and the
capacitor between GND at the cathode of the Schottky
are in the high frequency switching path where current
flow is discontinuous. These elements should be placed
so as to minimize the path between SW and the GND of
the IC. To reduce EMI, it is important to minimize the area
of the SW trace. Use a GND plane under SW to minimize
interplane coupling to sensitive signals. To obtain good
current regulation accuracy and eliminate sources of
channel-to-channel coupling, the CAP and LED inputs of
each channel of the LT3476 should be run as separate lines
back to the terminals of the appropriate sense resistor.
Since there is a small DC input bias current (~50µA) to
the LED and CAP inputs, resistance in series with these
inputs should be minimized, otherwise there will be an
offset. Finally, the bypass capacitor on the V
IN
supply to
the LT3476 should be placed as close as possible to the
V
IN
terminal of the device.
Open-Circuit Protection/Overvoltage Lockout
The LT3476 has independent internal overvoltage/open-
circuit protection (OVP) for all four converters, sensed
through their respective CAP inputs. The purpose of the
OVP feature is to protect the main switch of the device
from damage. In the boost configuration, if the LEDs are
disconnected from the circuit or fail open, the converter
output voltage at CAP is clamped at the OVP voltage of
35V (typ). Figure 1 shows the transient response of the
step-up converter application with LED1 disconnected.
With LED1 disconnected, the converter switches at cur-
rent limit as the output ramps up to OVP. Upon reaching
the OVP clamp voltage, the converter will switch with a
reduced current limit to regulate the converter output
voltage at the OVP clamp. In the buck mode application
shown in the Block Diagram, should the external supply
for CAP exceed the OVP clamp, then switching will be
inhibited for the converter. In order for the overvoltage
Figure 1. LED Disconnect Transient
20µs/DIV
I(SW)
1A/DIV
V(CAP)
0A
35V
20V
3476 F01
LED
DISCONNECT
HERE
ApplicAtions inForMAtion
protection feature to adequately protect the switch, it is
important that the CAP input sample a voltage at or near
the highest voltage reached by the SW node. As a result,
this OVP function will not provide adequate protection
from open load events in isolated power configurations
such as the 1:1 flyback, since input and output voltage
magnitudes must be summed to obtain the voltage seen
by the switch.
Setting the Switching Frequency
The switching frequency of the LT3476 is set by an exter-
nal resistor connected between the RT pin and GND. Do
not leave this pin open. Also, do not load this pin with a
capacitor. A resistor must always be connected for proper
operation. See Table 1 below or see the Oscillator Frequency
vs RT graph in the Typical Performance Characteristics for
resistor values and corresponding switching frequencies.
Table 1. Switching Frequency vs R
T
SWITCHING FREQUENCY (kHz) R
T
(kΩ)
200 140
400 61.9
1000 21
1200 16.2
2000 8.25
In general, a lower switching frequency should be used
where either very high or very low switch duty cycle opera-
tion is required, or higher efficiency is desired. Selection
of a higher switching frequency will allow use of smaller
value external components and yield a smaller solution
size and profile. Also for high frequency PWM dimming,
a higher switching frequency (shorter switching period)
will give better dimming control since for turning on the
