LT1720/LT1721
22
17201fc
The input waveform is presented to the diode bridge switch,
the output of which feeds the LT1227 wideband amplifier.
The LT1720 comparators, triggered by the sample com-
mand, generate phase-opposed outputs. These signals are
level shifted by the transistors, providing complementary
bipolar drive to switch the bridge. A skew compensation
trim ensures bridge-drive signal simultaneity within 1ns.
The AC balance corrects for parasitic capacitive bridge im-
balances. A DC balance adjustment trims bridge offset.
The trim sequence involves grounding the input via
50Ω and applying a 100kHz sample command. The
DC balance is adjusted for minimal bridge ON vs OFF
variation at the output. The skew compensation and AC
APPLICATIONS INFORMATION
balance adjustments are then optimized for minimum AC
disturbance in the output. Finally, unground the input and
the circuit is ready for use.
Voltage-Controlled Clock Skew Generator
It is sometimes necessary to generate pairs of identical
clock signals that are phase skewed in time. Further, it is
desirable to be able to set the amount of time skew via a
tuning voltage. Figure 18’s circuit does this by utilizing the
LT1720 to digitize phase information from a varactor-tuned
time domain bridge. A 0V to 2V control signal provides
±10ns of output skew. This circuit operates from a 2.7V
to 6V supply.
Figure 18. Voltage-Controlled Clock Skew
17201 F18
+
C2
1/2 LT1720
V
CC
2.7V TO 6V
V
CC
Q
Qa
FIXED
OUTPUT
MV-209
VARACTOR
DIODE
2.5k
CLOCK
INPUT
2.5k
0.1μF
2.2μF
0.005μF
“SKEWED”
“FIXED”
10ns
TRIM
36pF
1.82M*
6.2M*
1.1M
100k
200pF
2k*
+
C1
1/2 LT1720
SKEWED
OUTPUT
INPUT
0V TO 2V ≈
p10ns
SKEW
2.5k*
14k
2k
12pF
1M
1M
V
CC
+
A1
LT1077
* 1% FILM RESISTOR
** SUMIDA CD43-100
POLYSTYRENE, 5%
= 1N4148
= 74HC04
+
LT1317
V
IN
SW
47μF
L1**
V
C
GND
FB
+
LT1720/LT1721
23
17201fc
APPLICATIONS INFORMATION
Coincidence Detector
High speed comparators are especially suited for interfac-
ing pulse-output transducers, such as particle detectors,
to logic circuitry. The matched delays of a monolithic dual
are well suited for those cases where the coincidence of
two pulses needs to be detected. The circuit of Figure 19
is a coincidence detector that uses an LT1720 and discrete
components as a fast AND gate.
The reference level is set to 1V, an arbitrary threshold. Only
when both input signals exceed this will a coincidence
be detected. The Schottky diodes from the comparator
outputs to the base of the MRF-501 form the AND gate,
while the other two Schottkys provide for fast turn-off.
A logic AND gate could instead be used, but would add
considerably more delay than the 300ps contributed by
this discrete stage.
This circuit can detect coincident pulses as narrow as 3ns.
For narrower pulses, the output will degrade gracefully,
responding, but with narrow pulses that don’t rise all the
way to “high” before starting to fall. The decision delay is
4.5ns with input signals 50mV or more above the refer-
ence level. This circuit creates a TTL compatible output
but it can typically drive CMOS as well.
For a more detailed description of the operation of this
circuit, see Application Note 75, pages 10 and 11.
Figure 19. A 3ns Coincidence Detector
5V
3.9k
1k
0.1μF
51Ω
51Ω
300Ω
300Ω
5V 5V
4s 1N5711
MRF501
OUTPUT
GROUND
CASE LEAD
COINCIDENCE COMPARATORS
300ps AND GATE
17201 F19
1/2 LT1720
+
+
1/2 LT1720
LT1720/LT1721
24
17201fc
SIMPLIFIED SCHEMATIC
–IN
+IN
GND
17201 SS
OUTPUT
V
CC
150Ω
150Ω

LT1720IMS8#PBF

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Analog Comparators Dual 3V/5V Hi Speed Comparator
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
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