NCP392C
www.onsemi.com
8
VIN
OVLO
VOUT
UVLO
High−Z
Figure 7. EN and ACOK Associated Timers
t
START
t
START2
t
RISE
t
OFF
ACOK
EN
t
START
t
RISE
t
START2
ACOK Pin
The NCP392C version integrates a ACOK status
indicator. This is a drain pin tied low when no fault is present
(no TSd, no under voltage, no over voltage).
When disabled, the ACOK
feature is disabled too and the
output pin is in high impedance mode.
Thermal Shutdown Protection
In case of internal overheating, the integrated thermal
shutdown (TSD) protection allows to open the internal
MOSFET in order to instantaneously decrease the device
temperature.
Embedded hysteresis allows to reengage the MOSFET
when the junction temperature decreases.
If the fault event is still present, the temperature increases
again and engages the thermal shutdown one more time until
fault event disappeared.
PCB Recommendations
To limit internal power dissipation, PCB routing must be
carefully done to improve current capability.
The NCP392C is declined in a CSP package. So power
dissipation can be decreased on each pin connection but
main thermal area must be as large as possible around IN and
OUT pins. Taking into account and respectively, four IN and
OUT pins must be hardwired together on the PCB.
Maximum power dissipation can be calculated with the
following formula:
T
J
* T
A
+ R
qJA
P
d
(eq. 3)
T
J
: junction temperature
T
A
: ambient temperature
R
q
JA
: thermal resistance of the junction to air through the
case and board.
P
d
: power dissipation = R
DS(on)
x I
2
ESD Tests
The NCP392C fully supports the IEC61000−4−2, level 4
(Input pin, 1 mF mounted on board).
That means, in Air condition, V
in
has a ±15 kV ESD
protected input. In Contact condition, V
in
has ±8 kV ESD
protected input.
Please refer to Figure 8 to see the IEC 61000−4−2
electrostatic discharge waveform.
