10
COMMERCIAL TEMPERATURE RANGE
IDT72V3631/72V3641
3.3V CMOS SYNCFIFO™ 512 x 36 and 1,024 x 36
SYNCHRONOUS RETRANSMIT
The synchronous retransmit feature of these devices allow FIFO data to be
read repeatedly starting at a user-selected position. The FIFO is first put into
retransmit mode to select a beginning word and prevent ongoing FIFO write
operations from destroying retransmit data. Data vectors with a minimum length
of three words can retransmit repeatedly starting at the selected word. The FIFO
can be taken out of retransmit mode at any time and allow normal device
operation.
The FIFO is put in retransmit mode by a LOW-to-HIGH transition on CLKB
when the retransmit mode (RTM) input is HIGH and OR is HIGH. The rising
CLKB edge marks the data present in the FIFO output register as the first
retransmit data. The FIFO remains in retransmit mode until a LOW-to-HIGH
transition occurs while RTM is LOW.
When two or more reads have been done past the initial marked retransmit
word, a retransmit is initiated by a LOW-to-HIGH transition on CLKB when the
read-from-mark (RFM) input is HIGH. This rising CLKB edge shifts the first
retransmit word to the FIFO output register and subsequent reads can begin
immediately. Retransmit loops can be done endlessly while the FIFO is in
retransmit mode. RFM must be LOW during the CLKB rising edge that takes
the FIFO out of retransmit mode (see Figure 11).
When the FIFO is put into retransmit mode, it operates with two read pointers.
The current read pointer operates normally, incrementing each time when a
new word is shifted to the FIFO output register. This read pointer position is used
by the OR and AE flags. The shadow read pointer stores the memory location
at the time the device is put into retransmit mode and does not change until the
device is taken out of retransmit mode. The shadow read pointer position is used
by the IR and AF flags. Data writes can proceed while the FIFO is in retransmit
mode, but AF is set LOW by the write that stores (512-Y) or (1,024-Y) words
after the first retransmit word for the IDT72V3631 or IDT72V3641 respectively.
The IR flag is set LOW by the 512th or 1,024th write after the first retransmit word
for the IDT72V3631 or IDT72V3641 respectively.
When the FIFO is in retransmit mode and RFM is HIGH, a rising CLKB edge
loads the current read pointer with the shadow read-pointer value and the OR
flag reflects the new level of fill immediately. If the retransmit changes the FIFO
status out of the almost-empty range, up to two CLKB rising edges after the
retransmit cycle are needed to switch AE high (see Figure 12). The rising CLKB
edge that takes the FIFO out of retransmit mode shifts the read pointer used by
NOTES:
1. When a word is present in the FIFO output register, its previous memory location is free.
2. Data in the output register does not count as a "word i n FIFO memory". Since in FWFT mode, the first words written to an empty FIFO goes unrequested to the output register (no read
operation necessary), it is not included in the memory count.
3. X is the Almost-Empty Offset for AE. Y is the Almost-Full Offset for AF.
gramming section). The AE flag is LOW when the FIFO contains X or less words
and is HIGH when the FIFO contains (X+1) or more words. A data word present
in the FIFO output register has been read from memory.
Two LOW-to-HIGH transitions of CLKB are required after a FIFO write for
the AE flag to reflect the new level of fill; therefore, the AE flag of a FIFO containing
(X+1) or more words remains LOW if two cycles of CLKB have not elapsed since
the write that filled the memory to the (X+1) level. An AE flag is set HIGH by the
second LOW-to-HIGH transition of CLKB after the FIFO write that fills memory
to the (X+1) level. A LOW-to-HIGH transition of CLKB begins the first
synchronization cycle if it occurs at time tSKEW2 or greater after the write that fills
the FIFO to (X+1) words. Otherwise, the subsequent CLKB cycle may be the
first synchronization cycle (see Figure 9).
ALMOST-FULL FLAG (AF)
The Almost-Full flag of a FIFO is synchronized to the port Clock that writes
data to its array (CLKA). The state machine that controls an AF flag monitors
a write-pointer and read-pointer comparator that indicates when the FIFO
memory status is almost-full, almost-full-1, or almost-full-2. The almost-full state
is defined by the contents of register Y. This register is loaded with a preset value
during a FIFO reset, programmed from port A, or programmed serially (see
Almost-Empty flag and Almost-Full flag offset programming section). The AF flag
is LOW when the number of words in the FIFO is greater than or equal to (512-Y)
or (1,024-Y) for the IDT72V3631 or IDT72V3641 respectively. The AF flag
is HIGH when the number of words in the FIFO is less than or equal to
[512-(Y+1)] or [1,024-(Y+1)] for the IDT72V3631 or IDT72V3641 respec-
tively. A data word present in the FIFO output register has been read from
memory.
Two LOW-to-HIGH transitions of CLKA are required after a FIFO read for
its AF flag to reflect the new level of fill. Therefore, the AF flag of a FIFO containing
[512/1,024-(Y+1)] or less words remains LOW if two cycles of CLKA have not
elapsed since the read that reduced the number of words in memory to [512/
1,024-(Y+1)]. An AF flag is set HIGH by the second LOW-to-HIGH transition
of CLKA after the FIFO read that reduces the number of words in memory to
[512/1,024-(Y+1)]. A LOW-to-HIGH transition of CLKA begins the first
synchronization cycle if it occurs at time t
SKEW2 or greater after the read that
reduces the number of words in memory to [512/1,024-(Y+1)]. Otherwise, the
subsequent CLKA cycle may be the first synchronization cycle (see Figure 10).
Number of Words in the FIFO
(1,2)
Synchronized Synchronized
to CLKB to CLKA
IDT72V3631
(3)
IDT72V3641
(3)
OR AE AF IR
00LLHH
1 to X 1 to X H L H H
(X+1) to [512-(Y+1)] (X+1) to [1,024-(Y+1)] H H H H
(512-Y) to 511 (1,024-Y) to 1,023 H H L H
512 1,024 H H L L
TABLE 4
— —
— —
— FIFO FLAG OPERATION
