MAX17112
High-Performance, Step-Up, DC-DC Converter
8 _______________________________________________________________________________________
Output Current Capability
The output current capability of the MAX17112 is a
function of current limit, input voltage, operating fre-
quency, and inductor value. Because of the slope com-
pensation used to stabilize the feedback loop, the
inductor current limit depends on the duty cycle. The
current limit is determined by the following equation:
where I
LIM_EC
is the current limit specified at 75% duty
cycle (see the
Electrical Characteristics
table) and D is
the duty cycle.
The output current capability depends on the current-
limit value and is governed by the following equation:
where I
LIM
is the current limit calculated above, η is the
regulator efficiency (85% nominal), D is the duty cycle,
and f
OSC
is switching frequency. The duty cycle when
operating at the current limit is:
where V
DIODE
is the rectifier diode forward voltage and
R
ON
is the on-resistance of the internal MOSFET.
Soft-Start
The MAX17112 can be programmed for soft-start upon
power-up with an external capacitor. When the shut-
down pin is taken high, the soft-start capacitor (C
SS
) is
immediately charged to 0.4V. Then the capacitor is
charged at a constant current of 4µA (typ). During this
time, the SS voltage directly controls the peak inductor
current period. Full current limit is readied at V
SS
= 1.5V.
The maximum load current is available after the soft-
start is completed. When SHDN is low, SS is discharged
to ground.
Overvoltage Protection (OVP)
To prevent damage due to an input surge voltage, the
MAX17112 integrates an OVP circuit. There is an internal
switch between IN and V
L
, which is on when the IN volt-
age is less than 6.6V (typ). The switch is off when the IN
exceeds 6.6V (typ). Since V
L
supplies the IC, the switch
protects the IC from damage when excessively high
voltage is applied to IN.
V
L
Undervoltage Lockout (UVLO)
The undervoltage lockout (UVLO) circuit compares the
voltage at V
L
with the UVLO (2.45V typ) to ensure that
the input voltage is high enough for reliable operation.
The 50mV (typ) hysteresis prevents supply transients
from causing a restart. Once the V
L
voltage exceeds the
UVLO-rising threshold, the startup begins. When the
input voltage falls below the UVLO-falling threshold, the
main step-up regulator turns off.
Startup Using SHDN
The MAX17112 can be enabled by applying high volt-
age on the SHDN pin. Figure 2 shows the block dia-
gram of the internal SHDN pin function. There are two
ways to apply this high voltage. When SHDN is con-
nected to an external capacitor, an internal 5µA current
source charges up this capacitor and when the voltage
on SHDN passes 1.24V, the IC starts up. Another way
to enable the IC through the SHDN pin is to directly
apply a logic-high signal to SHDN instead of connect-
ing a capacitor.
The delay time for startup by connecting an external
capacitor at SHDN can be estimated using the follow-
ing equation:
where C
SHDN
is in microfarads.
When enabling the IC by applying a logic-high signal to
SHDN, a series resistor should be inserted between the
logic signal and SHDN for protection purposes. This
resistor can help limit the current drawn from the logic
signal supply into the SHDN pin when SHDN is dis-
charged to GND through the internal switch at the
moment of startup when V
L
< UVLO. A typical value for
this resistor is 10kΩ. Figure 3 shows the application cir-
cuit for this enabling method of applying a logic-high
signal to SHDN through a 10kΩ resistor.