ST16C454
4
Rev. 3.31
16/-68 31 I 16/68 Interface Type Select (input with internal pull-up). - This input
provides the 16 (Intel) or 68 (Motorola) bus interface type select. The
functions of -IOR, -IOW, INT A-D, and -CS A-D are re-assigned with
the logical state of this pin. When this pin is a logic 1, the 16 mode
interface ST16C454 is selected. When this pin is a logic 0, the 68
mode interface (ST68C454) is selected. When this pin is a logic 0,
-IOW is re-assigned to R/-W, RESET is re-assigned to -RESET, -
IOR is not used, and INT A-D(s) are connected in a WIRE-OR”
configuration. The WIRE-OR outputs are connected internally to the
open source IRQ signal output.
A0 34 I Address-0 Select Bit. Internal registers address selection in 16 and
68 modes.
A1 33 I Address-1 Select Bit. Internal registers address selection in 16 and
68 modes.
A2 32 I Address-2 Select Bit. - Internal registers address selection in 16
and 68 modes.
A3-A4 20,50 I Address 3-4 Select Bits. - When the 68 mode is selected, these
pins are used to address or select individual UART’s (providing -
CS is a logic 0). In the 16 mode, these pins are reassigned as chip
selects, see -CSB and -CSC.
-CS 16 I Chip Select. (active low) - In the 68 mode, this pin functions as a
multiple channel chip enable. In this case, all four UART’s (A-D)
are enabled when the -CS pin is a logic 0. An individual UART
channel is selected by the data contents of address bits A3-A4.
When the 16 mode is selected, this pin functions as -CSA, see
definition under -CS A-B.
-CS A-B 16,20
-CS C-D 50,54 I Chip Select A, B, C, D (active low) - This function is associated with
the 16 mode only, and for individual channels, “A” through “D.”
When in 16 Mode, these pins enable data transfers between the
user CPU and the ST16C454 for the channel(s) addressed.
Individual UART sections (A, B, C, D) are addressed by providing
a logic 0 on the respective -CS A-D pin. When the 68 mode is
selected, the functions of these pins are reassigned. 68 mode
functions are described under the their respective name/pin
headings.
Symbol Pin Signal Pin Description
type
SYMBOL DESCRIPTION
ST16C454
5
Rev. 3.31
D0-D2 66-68 I/O
D3-D7 1-5 Data Bus (Bi-directional) - These pins are the eight bit, three state
data bus for transferring information to or from the controlling CPU.
D0 is the least significant bit and the first data bit in a transmit or
receive serial data stream.
GND 6,23
GND 40,57 Pwr Signal and power ground.
INT A-B 15,21
INT C-D 49,55 O Interrupt A, B, C, D (active high) - This function is associated with
the 16 mode only. These pins provide individual channel inter-
rupts, INT A-D. INT A-D are enabled when MCR bit-3 is set to a
logic 1, interrupts are enabled in the interrupt enable register (IER),
and when an interrupt condition exists. Interrupt conditions in-
clude: receiver errors, available receiver buffer data, transmit
buffer empty, or when a modem status flag is detected. When the
68 mode is selected, the functions of these pins are reassigned. 68
mode functions are described under the their respective name/pin
headings.
INTSEL 65 I Interrupt Select. (active high, with internal pull-down) - This
function is associated with the 16 mode only. When the 16 mode
is selected, this pin can be used in conjunction with MCR bit-3 to
enable or disable the three state interrupts, INT A-D or override
MCR bit-3 and force continuous interrupts. Interrupt outputs are
enabled continuously by making this pin a logic 1. Making this pin
a logic 0 allows MCR bit-3 to control the three state interrupt output.
In this mode, MCR bit-3 is set to a logic “1” to enable the three state
outputs. This pin is disabled in the 68 mode.
-IOR 52 I Read strobe. (active low Strobe) - This function is associated with
the 16 mode only. A logic 0 transition on this pin will load the
contents of an Internal register defined by address bits A0-A2 onto
the ST16C454 data bus (D0-D7) for access by an external CPU.
This pin is disabled in the 68 mode.
-IOW 18 I Write strobe. (active low strobe) - This function is associated with
the 16 mode only. A logic 0 transition on this pin will transfer the
contents of the data bus (D0-D7) from the external CPU to an
internal register that is defined by address bits A0-A2. When the
16 mode is selected, this pin functions as R/-W, see definition under
Symbol Pin Signal Pin Description
type
SYMBOL DESCRIPTION
ST16C454
6
Rev. 3.31
R/-W.
-IRQ 15 O Interrupt Request or Interrupt “A” - This function is associated with the
68 mode only. In the 68 mode, interrupts from UART channels A-D
are WIRE-OR’ed” internally to function as a single IRQ interrupt. This
pin transitions to a logic 0 (if enabled by the interrupt enable register)
whenever a UART channel(s) requires service. Individual channel
interrupt status can be determined by addressing each channel
through its associated internal register, using -CS and A3-A4. In the
68 mode an external pull-up resistor must be connected between this
pin and VCC. The function of this pin changes to INTA when operating
in the 16 mode, see definition under INTA.
-RESET
RESET 37 I Reset. - In the 16 mode a logic 1 on this pin will reset the internal
registers and all the outputs. The UART transmitter output and the
receiver input will be disabled during reset time. (See ST16C454
External Reset Conditions for initialization details.) When 16/-68
is a logic 0 (68 mode), this pin functions similarly but, as an inverted
reset interface signal, -RESET.
R/-W 18 I Read/Write Strobe (active low) - This function is associated with
the 68 mode only. This pin provides the combined functions for
Read or Write strobes. A logic 1 to 0 transition transfers the
contents of the CPU data bus (D0-D7) to the register selected by
-CS and A0-A4. Similarly a logic 0 to 1 transition places the
contents of a 454 register selected by -CS and A0-A4 on the data
bus, D0-D7, for transfer to an external CPU.
VCC 13
VCC 47,64 I Power supply inputs.
XTAL1 35 I Crystal or External Clock Input - Functions as a crystal input or as
an external clock input. A crystal can be connected between this
pin and XTAL2 to form an internal oscillator circuit (see figure 8).
Alternatively, an external clock can be connected to this pin to
provide custom data rates (see Baud Rate Generator Program-
ming).
XTAL2 36 O Output of the Crystal Oscillator or Buffered Clock - (See also
XTAL1). Crystal oscillator output or buffered clock output.
Symbol Pin Signal Pin Description
type
SYMBOL DESCRIPTION

ST16C454IJ68TR-F

Mfr. #:
Manufacturer:
MaxLinear
Description:
UART Interface IC QUAD UART
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union