LT3845
16
3845fd
APPLICATIONS INFORMATION
Choose the MOSFET V
DSS
specifi cation to exceed the
maximum voltage across the drain to the source of the
MOSFET, which is V
IN(MAX)
plus any additional ringing
on the switch node. Ringing on the switch node can be
greatly reduced with good PCB layout and, if necessary,
an RC snubber.
In some applications, parasitic FET capacitances couple
the negative going switch node transient onto the bottom
gate drive pin of the LT3845, causing a negative voltage
in excess of the Absolute Maximum Rating to be imposed
on that pin. Connection of a catch Schottky diode from
this pin to ground will eliminate this effect. A 1A current
rating is typically suffi cient of the diode.
The internal V
CC
regulator is capable of sourcing up to
40mA limiting the maximum total MOSFET gate charge,
Q
G
, to 35mA/f
SW
. The Q
G
vs V
GS
specifi cation is typically
provided in the MOSFET data sheet. Use Q
G
at V
GS
of 8V.
If V
CC
is back driven from an external supply, the MOSFET
drive current is not sourced from the internal regulator
of the LT3845 and the Q
G
of the MOSFET is not limited
by the IC. However, note that the MOSFET drive current
is supplied by the internal regulator when the external
supply back driving V
CC
is not available such as during
start-up or short circuit.
The manufacturers maximum continuous drain current
specifi cation should exceed the peak switch current,
I
OUT(MAX)
+ ΔI
L
/2.
During the supply start-up, the gate drive levels are set by
the V
CC
voltage regulator, which is approximately 8V. Once
the supply is up and running, the V
CC
can be back driven
by an auxiliary supply such as V
OUT
. It is important not to
exceed the manufacturers maximum V
GS
specifi cation.
A standard level threshold MOSFET typically has a V
GS
maximum of 20V.
Input Capacitor Selection
A local input bypass capacitor is required for buck convert-
ers because the input current is pulsed with fast rise and
fall times. The input capacitor selection criteria are based
on the bulk capacitance and RMS current capability. The
bulk capacitance will determine the supply input ripple
voltage. The RMS current capability is used to prevent
overheating the capacitor.
The bulk capacitance is calculated based on maximum
input ripple, ΔV
IN
:
C
IN(BULK)
=
I
OUT(MAX)
•V
OUT
ΔV
IN
•f
SW
•V
IN
(
MIN
)
ΔV
IN
is typically chosen at a level acceptable to the user.
100mV to 200mV is a good starting point. Aluminum elec-
trolytic capacitors are a good choice for high voltage, bulk
capacitance due to their high capacitance per unit area.
The capacitors RMS current is:
I
CIN(RMS)
=I
OUT
V
OUT
(V
IN
–V
OUT
)
(V
IN
)
2
If applicable, calculate it at the worst case condition,
V
IN
= 2V
OUT
. The RMS current rating of the capacitor
is specifi ed by the manufacturer and should exceed the
calculated I
CIN(RMS)
. Due to their low ESR (Equivalent
Series Resistance), ceramic capacitors are a good choice
for high voltage, high RMS current handling. Note that the
ripple current ratings from aluminum electrolytic capacitor
manufacturers are based on 2000 hours of life. This makes
it advisable to further derate the capacitor or to choose a
capacitor rated at a higher temperature than required.
The combination of aluminum electrolytic capacitors and
ceramic capacitors is an economical approach to meet-
ing the input capacitor requirements. The capacitor volt-
age rating must be rated greater than V
IN(MAX)
. Multiple
capacitors may also be paralleled to meet size or height
requirements in the design. Locate the capacitor very close
to the MOSFET switch and use short, wide PCB traces to
minimize parasitic inductance.
Output Capacitor Selection
The output capacitance, C
OUT
, selection is based on the
design’s output voltage ripple, ΔV
OUT
and transient load
requirements. ΔV
OUT
is a function of ΔI
L
and the C
OUT
ESR. It is calculated by:
V
OUT
= I
L
•ESR+
1
(8 f
SW
•C
OUT
)
LT3845
17
3845fd
The maximum ESR required to meet a ΔV
OUT
design
requirement can be calculated by:
ESR(MAX)=
(
V
OUT
)(L)(f
SW
)
V
OUT
•1
V
OUT
V
IN(MAX)
Worst-case ΔV
OUT
occurs at highest input voltage. Use
paralleled multiple capacitors to meet the ESR require-
ments. Increasing the inductance is an option to lower the
ESR requirements. For extremely low ΔV
OUT
, an additional
LC fi lter stage can be added to the output of the supply.
Application Note 44 has some good tips on sizing an ad-
ditional output fi lter.
Output Voltage Programming
A resistive divider sets the DC output voltage according
to the following formula:
R2 = R1
V
OUT
1.231V
–1
The external resistor divider is connected to the output
of the converter as shown in Figure 3. Tolerance of the
feedback resistors will add additional error to the output
voltage.
Example: V
OUT
= 12V; R1 = 10kΩ
R2 = 10k
12V
1.231V
1 = 87.48k use 86.6k 1%
The V
FB
pin input bias current is typically 25nA, so use
of extremely high value feedback resistors could cause a
converter output that is slightly higher than expected. Bias
current error at the output can be estimated as:
ΔV
OUT(BIAS)
= 25nA • R2
Supply UVLO and Shutdown
The SHDN pin has a precision voltage threshold with
hysteresis which can be used as an undervoltage lockout
threshold (UVLO) for the power supply. Undervoltage
lockout keeps the LT3845 in shutdown until the supply
input voltage is above a certain voltage programmed by
the user. The hysteresis voltage prevents noise from falsely
tripping UVLO.
Resistors are chosen by fi rst selecting R
B
. Then
R
A
= R
B
V
SUPPLY(ON)
1.35V
–1
V
SUPPLY(ON)
is the input voltage at which the undervoltage
lockout is disabled and the supply turns on.
Example: Select R
B
= 49.9kΩ, V
SUPPLY(ON)
= 14.5V (based
on a 15V minimum input voltage)
R
A
= 49.9k
14.5V
1.35V
–1
= 486.1k (499k resistor is selected)
APPLICATIONS INFORMATION
L1
V
FB
PIN
R2
R1
V
OUT
C
OUT
3845 F03
SHDN PIN
R
A
R
B
V
SUPPLY
3845 F04
Figure 3. Output Voltage Feedback Divider Figure 4. Undervoltage Feedback Divider
LT3845
18
3845fd
If low supply current in standby mode is required, select
a higher value of R
B
.
The supply turn off voltage is 9% below turn on. In the
example the V
SUPPLY(OFF)
would be 13.2V.
If additional hysteresis is desired for the enable function,
an external positive feedback resistor can be used from
the LT3845 regulator output.
The shutdown function can be disabled by connecting the
SHDN pin to the V
IN
through a large value pull-up resistor.
This pin contains a low impedance clamp at 6V, so the SHDN
pin will sink current from the pull-up resistor(R
PU
):
I
SHDN
=
V
IN
–6V
R
PU
Because this arrangement will clamp the SHDN pin to the
6V, it will violate the 5V absolute maximum voltage rating of
the pin. This is permitted, however, as long as the absolute
maximum input current rating of 1mA is not exceeded.
Input SHDN pin currents of <100μA are recommended: a
1MΩ or greater pull-up resistor is typically used for this
confi guration.
Soft-Start
The desired soft-start time (t
SS
) is programmed via the
C
SS
capacitor as follows:
C
SS
=
A • t
SS
1.231V
The amount of time in which the power supply can withstand
a V
IN
, V
CC
or V
SHDN
UVLO fault condition (t
FAULT
) before
the C
SS
pin voltage enters its active region is approximated
by the following formula:
t
FAULT
=
C
SS
0.65V
50µA
Oscillator SYNC
The oscillator can be synchronized to an external clock.
Set the R
SET
resistor at least 10% below the desired sync
frequency.
It is recommended that the SYNC pin be driven with a
square wave that has amplitude greater than 2V, pulse
width greater than 1μs and rise time less than 500ns. The
rising edge of the sync wave form triggers the discharge
of the internal oscillator capacitor. The SYNC pin is not
available in the N-Package.
Minimum On-Time Considerations (Buck Mode)
Minimum on-time t
ON(MIN)
is the smallest amount of time
that the LT3845 is capable of turning the top MOSFET on and
off again. It is determined by internal timing delays and the
amount of gate charge required turning on the top MOSFET.
Low duty cycle applications may approach this minimum
on-time limit and care should be taken to ensure that:
t
ON
=
V
OUT
V
IN
•f
SW
> t
ON(MIN)
where t
ON(MIN)
is 400ns worst case.
If the duty cycle falls below what can be accommodated by
the minimum on-time, the LT3845 will begin to skip cycles.
The output will be regulated, but the ripple current and
ripple voltage will increase. If lower frequency operation
is acceptable, the on-time can be increased above t
ON(MIN)
for the same step-down ratio.
Layout Considerations
The LT3845 is typically used in DC/DC converter designs
that involve substantial switching transients. The switch
drivers on the IC are designed to drive large capacitances
and, as such, generate signifi cant transient currents
themselves. Careful consideration must be made regard-
ing supply bypass capacitor locations to avoid corrupting
the ground reference used by IC.
Typically, high current paths and transients from the
input supply and any local drive supplies must be kept
isolated from SGND, to which sensitive circuits such as
the error amp reference and the current sense circuits
are referred.
Effective grounding can be achieved by considering switch
current in the ground plane, and the return current paths of
each respective bypass capacitor. The V
IN
bypass return,
V
CC
bypass return, and the source of the synchronous
APPLICATIONS INFORMATION

LT3845IFE#TRPBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Switching Voltage Regulators High Voltage Synch Current Mode Step-Down Controller
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union