LT1683
19
1683fd
APPLICATIONS INFORMATION
So, given the turns ratio, primary inductance and cur-
rent, the transformer can be designed. The design of the
transformer will require analyzing the power losses of the
transformer and making necessary adjustments.
Most transformer companies can assist you with designing
an optimal solution. For instance Midcom, Inc. (1-800-
643-2661). Linear Technologys application group can
also help.
As an example say we are designing a 48V ±20% to 5V
100kHz converter with 2A output and 500mA ripple. Then
starting with a guess for the on voltage of the MOSFET
plus sense resistor of 0.5V and V
F
of 0.5V:
N=
5+ 0.5
88% 48 80%0.5
( )
=
1
6.1
For continuous operation at I
OUT(MIN)
= I
OUT(MAX)
/4,
inductor ripple (the same as output ripple):
I
L
= 2
2A
4
= 1A
The duty cycle for nominal input is:
DC
NOM
=
V
OUT
+ V
F
2N V
IN(NOM)
I
SW
R
ON
( )
=
5.5
2
6.1
47.5
= 35.3%
Then:
L =
5+ 0.5
( )
12 35.3%
( )
1A 100kHz
= 16µH
Off-the-shelf components can be used for this inductor.
Say we choose a 22µH inductor, then ripple current at
maximum input (DC = 29.1%) is:
I
L
=
5+ 0.5
( )
12 29.1%
( )
22µF 100kHz
= 1.03A
The maximum inductor current is:
I
L(MAX)
= 2A +
1.03A
2
= 2.52A
Primary inductance should be greater than:
L
PRI
= 5 • 22µH • 6.1
2
= 4.1mH
The secondary inductance would then be:
4.1mH/6.1
2
= 110µH
The magnetizing ripple current is approximately:
I
MAG
=
5.5
1
6.1
4.1mH 100kHz
= 81mA
Peak switch current is:
I
SW(PEAK)
=
1
6.1
2.51A +81mA = 494mA
Note that you can discern your magnetizing ripple by
looking at the reflected inductance ripple and subtracting
it from the switch current ripple.
∆I
MAG
= ∆I
SW
– N • I
L
The max ripple current on the switch is:
I
SW(MAX)
=
1.03A
6.1
+ 81mA = 0.25A
Knowing the peak switch current we can go back and
iterate with a more accurate switch-on voltage. We
would have to know the R
ON
of the FET. In our case our
assumptions of a 0.5V switch-on voltage is valid for
R
ON
+ R
SENSE
< 1Ω.
Capacitors
Correct choice of input and output capacitors is very
important to low noise switcher performance. Push-pull
topologies and other low noise topologies will in general
have continuous currents, which reduce the requirements
LT1683
20
1683fd
APPLICATIONS INFORMATION
for capacitance. However, noise depends more on the ESR
of the capacitors. In addition lower ESR can also improve
efficiency.
Input capacitors must also withstand surges that occur
during the switching of some types of loads. Some solid tan-
talum capacitors can fail under these surge conditions.
Design Note 95 offers more information but the following
is a brief summary of capacitor types and attributes.
Aluminum Electrolytic: Low cost and higher voltage. They
can be used in this application but in general you will
need higher capacitance to achieve low ESR. Additional
nonelectrolytic capacitors may be required to achieve
better performance.
Specialty Polymer Aluminum: Panasonic has come out
with their series CD capacitors. While they are only avail-
able for voltages below 16V, they have very low ESR and
good surge capability.
Solid Tantalum: Small size and low impedance. Typically
the maximum voltage rating is 50V. With large surge cur-
rents the capacitor may need to be derated or you need a
special type such as AVX TPS line.
OS-CON: Lower impedance than aluminum but only avail-
able for 35V or less. Form factor may be a problem.
Ceramic: Generally used for high frequency and high
voltage bypass. They may resonate with their ESL before
ESR becomes dominant. Recent multilayer ceramic (MLC)
capacitors provide larger capacitance with low ESR.
There are continuous improvements being made in ca-
pacitors so consult with manufacturers as to your specific
needs.
Input Capacitors
The input capacitor should have low ESR at high frequen-
cies since this will be an important factor concerning how
much conducted noise is created.
There are two separate requirements for input capacitors.
The first is for supply to the part’s V
IN
pin. The V
IN
pin
will provide current for the part itself and the gate charge
current.
The worst component from an AC point is the gate charge
current. The actual peak current depends on gate capaci-
tance and slew rate, being higher for larger values of each.
The total current can be estimated by gate charge and
frequency of operation. Because of the slewing with this
part, gate charge is spread out over a longer time period
than with a normal FET driver. This reduces capacitance
requirements.
Typically the current will have spikes of under 100mA
located at the gate voltage transitions. This is charge/dis-
charge to and from the threshold voltage. Most slewing
occurs with the gate voltage near threshold.
Since the part’s V
IN
will typically be under 15V many op-
tions are available for choice of capacitor. Values of input
capacitor for just V
IN
requirement will typically be in the
50µF range with an ESR of under 0.1Ω.
In addition to the part supply, decoupling of the supply to
the transformer needs to be considered. If this is the same
supply as the V
IN
pin then that capacitor will need to be
increased. However, often with this part the transformer
supply will be a higher voltage and as such a separate
capacitor.
The transformer decoupling capacitor will see the switch
current as ripple.
This switch current computation can be used to estimate
the capacity for these capacitors:
C
IN
=
1
V
CAP
I
SW(MAX)
ESR
DC
MIN
f
where ∆V
CAP
is the allowed sag on the input capacitor. ESR
is the equivalent series resistance for the cap. In general
allowed sag will be a few tenths of volts.
Output Filter Capacitor
The output capacitor is chosen both for capacity and ESR.
The capacity must supply the load current in the switch-
off state. While slew control reduces higher frequency
components of the ripple current in the capacitor, the
capacitor ESR and the magnitude of the output ripple
LT1683
21
1683fd
APPLICATIONS INFORMATION
current controls the fundamental component. ESR should
also be low to reduce capacitor dissipation.
The capacitance value can be computed by consideration
of desired load ripple, duty cycle and ESR.
C
OUT
=
1
V
OUT
I
L(MAX)
ESR
DC
MIN
f
MOSFET Selection
There is a wide variety of MOSFETs to choose from for
this part. The part will work with either normal threshold
(3V to 4V) or logic-level threshold devices (1V to 2V).
Select a voltage rating to ensure under worst-case condi-
tions that the MOSFET will not break down. Next choose
an R
ON
sufficiently low to meet both the power dissipation
capabilities of the MOSFET package as well as overall ef-
ficiency needs of the converter.
The LT1683 can handle a large range of gate charges.
However at very large charge stability may be affected.
The power dissipation in the MOSFET depends on several
factors. The primary element is I
2
R heating when the device
is on. In addition, power is dissipated when the device is
slewing. An estimate for power dissipation is:
PV
I
I
I
VR I
I
IN
SR
IN
ON
=
+
+
+
Δ
•Δ
2
2
2
2
2
2
4
3
4
+
V
I
f I R DC
SR
ON
••
2
where I is the average current, ∆I is the ripple current in
the switch, I
SR
is the current slew rate, V
SR
is the voltage
slew rate, f is the oscillator frequency, DC is the duty cycle
and R
ON
is the MOSFET on-resistance.
Setting GCL Voltage
Setting the voltage on the GCL pin depends on what type
of MOSFET is used and the desired gate drive undervoltage
lockout voltage.
First determine the maximum gate drive that you require.
Typically you will want it to be at least 2V greater than the
maximum threshold. Higher voltages will lower the on
resistance and increase efficiency. Be certain to check the
maximum allowed gate voltage. Often this is 20V but for
some logic threshold MOSFETs it is only 8V to 10V.
V
GCL
needs to be set approximately 0.2V above the desired
max gate threshold. In addition V
IN
needs to be at least
1.6V above the gate voltage.
The GCL pin can be tied to V
IN
which will result in a maxi-
mum gate voltage of V
IN
– 1.6V.
This pin also controls undervoltage lockout of the gate
drives. The undervoltage lockout will prevent the MOSFETs
from switching until there is sufficient drive present.
If GCL is tied to a voltage source or Zener less than 6.8V,
the gate drivers will not turn on until V
IN
exceeds the GCL
voltage by 0.8V. For V
GCL
above 6.5V, the gate drives are
ensured to be off for V
IN
< 7.3V and they will be turned
on by V
GCL
+ 0.8V.
If GCL is tied to V
IN
, the gate drivers are always on
(undervoltage lockout is disabled).
Approximately 50µA of current can be sourced from this pin
if V
IN
> V
GCL
+ 0.8V. This could be used to bias a Zener.
The GCL pin has an internal 19V Zener to ground that will
provide a failsafe for maximum gate voltage.
As an example say we are using a Siliconix Si4480DY
which has R
DS(ON)
rated at 6V. To get 6V, V
GCL
needs to
be set to 6.2V and V
IN
needs to be at least 7.6V.

LT1683EG#TRPBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Switching Voltage Regulators SR Controlled Ultralow N PP DC/DC Cntr
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