ADA4304-2ACPZ-R7

Data Sheet ADA4304-2
Rev. A | Page 3 of 10
SPECIFICATIONS
V
CC
= 5 V, 75 Ω system, T
A
= 25°C, unless otherwise noted.
Table 1.
Parameter Conditions Min Typ Max Unit
DYNAMIC PERFORMANCE
Bandwidth (−3 dB)
1600
Specified Frequency Range 54 865 MHz
Gain (S
21
, S
31
) f = 100 MHz; see Figure 17 and Figure 18 2.8 dB
1 dB Gain Flatness 1000 MHz
NOISE/DISTORTION PERFORMANCE
Noise Figure
1
@ 54 MHz 4.0 dB
@ 550 MHz 4.5 dB
@ 865 MHz 4.6 dB
Output IP3
f
1
= 97.25 MHz, f
2
= 103.25 MHz
26
Output IP2 f
1
= 97.25 MHz, f
2
= 103.25 MHz 44.5 dBm
Composite Triple Beat (CTB) 135 channels, 15 dBmV/channel, f = 865 MHz −72 dBc
Composite Second Order (CSO) 135 channels, 15 dBmV/channel, f = 865 MHz −62 dBc
Cross Modulation (CXM)
135 channels, 15 dBmV/channel, 100% modulation
@ 15.75 kHz, f = 865 MHz
−69 dBc
INPUT CHARACTERISTICS See Figure 17, Figure 18, and Figure 19
Input Return Loss (S
11
) @ 54 MHz −15 −11 dB
@ 550 MHz −35.5 −22 dB
@ 865 MHz −13.3 −8 dB
Output-to-Input Isolation (S
12
, S
13
) Either output, 54 MHz to 865 MHz
@ 54 MHz −32 −30 dB
@ 550 MHz −32 −29 dB
@ 865 MHz −33 −31 dB
OUTPUT CHARACTERISTICS See Figure 17, Figure 18, and Figure 19
Output Return Loss (S
22
, S
33
) Either output, 54 MHz to 865 MHz
@ 54 MHz −26.7 −21 dB
@ 550 MHz
−22
−15
@ 865 MHz −20 −12 dB
Output-to-Output Isolation (S
23
, S
32
) Either output, 54 MHz to 865 MHz dB
@ 54 MHz −26.7 dB
@ 550 MHz −25.1 dB
@ 865 MHz −25 dB
1 dB Compression (P
1dB
) Output referred, f = 100 MHz 8.25 dBm
POWER SUPPLY
Nominal Supply Voltage
4.75
5.0
5.25
Quiescent Supply Current 88 105 mA
1
Characterized with 50 Ω noise figure analyzer.
ADA4304-2 Data Sheet
Rev. A | Page 4 of 10
ABSOLUTE MAXIMUM RATINGS
Table 2.
Parameter Rating
Supply Voltage 5.5 V
Power Dissipation See Figure 3
Storage Temperature Range −65°C to +125°C
Operating Temperature Range −40°C to +85°C
Lead Temperature (Soldering, 10 sec) 300°C
Junction Temperature 150°C
Stresses at or above those listed under Absolute Maximum
Ratings may cause permanent damage to the product. This
is a stress rating only; functional operation of the product
at these or any other conditions above those indicated in
the operational section of this specification is not implied.
Operation beyond the maximum operating conditions for
extended periods may affect product reliability.
THERMAL RESISTANCE
θ
JA
is specified for the device (including exposed pad)
soldered to a high thermal conductivity 2s2p circuit board,
as described in EIA/JESD 51-7.
Table 3. Thermal Resistance
Package Type θ
JA
Unit
16-Lead LFCSP (Exposed Pad) 98 °C/W
Maximum Power Dissipation
The maximum safe power dissipation in the ADA4304-2
package is limited by the associated rise in junction
temperature (T
J
) on the die. At approximately 150°C,
which is the glass transition temperature, the plastic changes
its properties. Even temporarily exceeding this temperature
limit can change the stresses that the package exerts on the
die, permanently shifting the parametric performance of
the ADA4304-2. Exceeding a junction temperature of 150°C
for an extended period can result in changes in the silicon
devices, potentially causing failure.
The power dissipated in the package (P
D
) is essentially equal to
the quiescent power dissipation; the supply voltage (V
S
) times
the quiescent current (I
S
). In Table 1, the maximum power
dissipation of the ADA4304-2 can be calculated as
P
D (MAX)
= 5.25 V × 105 mA = 551 mW
Airflow increases heat dissipation, effectively reducing θ
JA
.
In addition, more metal directly in contact with the package
leads/exposed pad from metal traces, through-holes, ground,
and power planes reduces the θ
JA
.
Figure 3 shows the maximum safe power dissipation in the
package vs. the ambient temperature for the 16-lead LFCSP
(98°C/W) on a JEDEC standard 4-layer board.
0
0 100
06539-004
AMBIENT TEMPERATURE (°C)
MAXIMUM POWER DISSIPATION (W)
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
10 20 30
40 50 60
70 80
90
Figure 3. Maximum Power Dissipation vs. Temperature for a 4-Layer Board
ESD CAUTION
Data Sheet ADA4304-2
Rev. A | Page 5 of 10
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
VCC
VCC
GND
VIN
GND
VOUT1
VOUT2
GND
GND
GND
GND
NIC
VCC
VCC
IL
NIC
06539-002
PIN 1
INDICATOR
12
11
10
1
3
4
9
2
6
5
7
8
16
15
14
13
ADA4304-2
TOP VIEW
NOTES
1. NIC = NO INTERNAL CONNECTION.
2. THE EXPOSED PAD MUST BE
CONNECTED TO GND.
Figure 4. Pin Configuration
Table 4. Pin Function Descriptions
Pin No. Mnemonic Description
1, 2, 15, 16 VCC Supply Pin.
3, 5 to 7, 9, 11 GND Ground.
4 VIN Input.
8, 13 NIC No Internal Connection.
10 VOUT2 Output 2.
12 VOUT1 Output 1.
14 IL Bias Pin.
EPAD Exposed Pad. The exposed pad must be connected to GND.

ADA4304-2ACPZ-R7

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
RF Amplifier 1:2 SGL-Ended Active RF Splitter
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

Products related to this Datasheet