Circuit description L6227Q
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4.6 Non-dissipative overcurrent protection
The L6227Q integrates an overcurrent detection circuit (OCD). This circuit provides
protection against a short circuit to ground or between two phases of the bridge. With this
internal over current detection, the external current sense resistor normally used and its
associated power dissipation are eliminated. Figure 14 shows a simplified schematic of the
overcurrent detection circuit.
To implement the over current detection, a sensing element that delivers a small but precise
fraction of the output current is implemented with each high side power MOS. Since this
current is a small fraction of the output current there is very little additional power
dissipation. This current is compared with an internal reference current I
REF
. When the
output current in one bridge reaches the detection threshold (typically 2.8 A) the relative
OCD comparator signals a fault condition. When a fault condition is detected, the EN pin is
pulled below the turn off threshold (1.3 V typical) by an internal open drain MOS with a pull
down capability of 4 mA. By using an external R-C on the EN pin, the off time before
recovering normal operation can be easily programmed by means of the accurate
thresholds of the logic inputs.
Figure 14. Overcurrent protection simplified schematic
Figure 15 shows the overcurrent detection operation. The disable time t
DISABLE
before
recovering normal operation can be easily programmed by means of the accurate
thresholds of the logic inputs. It is affected whether by C
EN
and R
EN
values and its
magnitude is reported in Figure 16. The delay time t
DELAY
before turning off the bridge when
an overcurrent has been detected depends only by C
EN
value. Its magnitude is reported in
Figure 17.
C
EN
is also used for providing immunity to pin EN against fast transient noises. Therefore
the value of C
EN
should be chosen as big as possible according to the maximum tolerable
delay time and the R
EN
value should be chosen according to the desired disable time.
The resistor R
EN
should be chosen in the range from 2.2 kΩ to 180 kΩ. Recommended
values for R
EN
and C
EN
are respectively 100 kΩ and 5.6 nF that allow obtaining 200 µs
disable time.
+
OVER TEMPERATURE
I
REF
(I
1A
+I
2A
) / n
I
1A
/ n
POWER SENSE
1 cell
POWER SENSE
1 cell
POWER DMOS
n cells
POWER DMOS
n cells
HIGH SIDE DMOSs OF
THE BRIDGE A
OUT1
A
OUT2
A
VS
A
I
1A
I
2A
I
2A
/ n
FROM THE
BRIDGE B
OCD
COMPARATOR
OCD
COMPARATOR
TO GATE
LOGIC
INTERNAL
OPEN-DRAIN
R
DS(ON)
40Ω TYP.
C
EN
.
R
EN
.EN
V
DD
µC or LOGIC
D01IN1337
