OMO ElectronicOMO Electronic
Expand menu
Hello, Sign inMy Account
0 Cart

TLV2474CD

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21
TDF8546_SDS All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product short data sheet Rev. 8 — 27 September 2013 10 of 21
NXP Semiconductors
TDF8546
I
2
C-bus controlled 4 45 W best efficiency amplifier
t
off
amplifier switch-off time time to DC output voltage < 0.1 V;
I
LO
=0A
[2]
I
2
C-bus mode;
with I
LO
=5A +0 ms;
250 500 750 ms
via pin STB; (IB4[D6] = 0);
with I
LO
=5A +0 ms;
250 500 750 ms
t
d(mute-on)
delay time from mute to on from 10 % to 90 % of output
signal; V
i
=50mV; I
2
C-bus mode
(IB2[D1, D2] = 1 to 0) or IB2(D0 =
1 to 0) or legacy mode (V
STB
=
3 V to 7 V);
51540ms
t
d(soft_mute)
soft mute delay time from 90 % to 10 % of output
signal; V
i
=50mV; I
2
C-bus mode
(IB2[D1, D2] = 0 to 1) or legacy
mode (V
STB
= 7V to 3V);
51540ms
t
d(fast_mute)
fast mute delay time from 90 % to 10 % of output
signal; V
i
=50mV; I
2
C-bus mode
(IB2[D0] = 0 to 1, or V
STB
from
> 5.9 V to < 0.8 V in 1 s;
-0.41ms
t
(start-Vo(off))
engine start to output off time V
P
from 14.4 V to 5 V in 1.5 ms;
V
o
<0.5V;
-0.11ms
t
(start-SVRoff)
engine start to SVR off time V
P
from 14.4 V to 5 V in 1.5 ms;
V
SVR
<0.7V;
-4075ms
I
2
C-bus interface
[3]
V
IL
LOW-level input voltage pins SCL and SDA - - 1.5 V
V
IH
HIGH-level input voltage pins SCL and SDA 2.3 5.5 V
V
OL
LOW-level output voltage pin SDA; I
L
= 5 mA - - 0.4 V
f
SCL
SCL clock frequency - 400 - kHz
V
ADSEL
voltage on pin ADSEL I
2
C-bus address
A[6:0] = 1101 101
Rseries
ADSEL
= 0 4511V
Rseries
ADSEL
= 100 k --V
P
V
I
I(ADSEL)
input current on pin ADSEL V
STB
=5V; V
ADSEL
=5V - 2 10 A
R
ADSEL
resistance on pin ADSEL I
2
C-bus address
A[6:0] = 1101 110
99 100 101 k
I
2
C-bus address
A[6:0] = 1101 111
29.7 30 30.3 k
I
2
C-bus address
A[6:0] = 1101 010
9.9 10 10.1 k
legacy mode - - 0.47 k
V
P(latch)
latch supply voltage does not react to address
selection changes
--6V
Start-up diagnostics
Table 5. Characteristics
…continued
T
amb
=25
C; V
P
= 14.4 V; unless otherwise specified. Tested at T
amb
= 25
C; guaranteed for T
j
=
40
C to +150
C;
functionality is guaranteed for V
P
< 10 V unless otherwise specified.
Symbol Parameter Conditions Min Typ Max Unit
TDF8546_SDS All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product short data sheet Rev. 8 — 27 September 2013 11 of 21
NXP Semiconductors
TDF8546
I
2
C-bus controlled 4 45 W best efficiency amplifier
t
sudiag
start-up diagnostic time from start-up diagnostic
command via I
2
C-bus until
completion of start-up diagnostic;
V
O
+ < 0.1 V; V
O
< 0.1 V (no
load) IB1[D1] = 1;
50 130 250 ms
t
d(sudiag-on)
start-up diagnostic to on delay
time
at 90 % of output signal;
IB1[D0:D1] = 11;
- 680 - ms
V
offset
offset voltage start-up diagnostic offset voltage
under no load condition
1.3 2 2.5 V
R
Ldet(sudiag)
start-up diagnostic load
detection resistance
shorted load
high gain; IB3[D6:D5] = 00 - - 0.5
low gain; IB3[D6:D5] = 11 - - 1.5
normal load
high gain (IB3[D6:D5] = 00) 1.5 - 20
low gain (IB3[D6:D5] = 11) 3.2 - 20
line driver load 80 - 200
open load 400 - -
Amplifier diagnostics
V
OL(DIAG)
LOW-level output voltage on pin
DIAG
fault condition; I
DIAG
= 1 mA - - 0.3 V
V
O(offset_det)
output voltage at offset
detection
1.0 1.3 2.0 V
THD
clip
total harmonic distortion clip
detection level
V
P
> 10 V
IB2[D7:D6] = 10 - 10 - %
IB2[D7:D6] = 01 - 5 - %
IB2[D7:D6] = 00 - 2 - %
T
j(AV)(pwarn)
pre-warning average junction
temperature
IB3[D4] = 0 or legacy mode 150 160 170 C
IB3[D4] = 1 125 135 145 C
T
j(AV)(G(0.5dB))
average junction temperature
for 0.5 dB gain reduction
V
i
= 0.05 V; best efficiency mode
turns off when activated
- 175 - C
G
(th_fold)
gain reduction of thermal
foldback
when all channels switch off - 20 - dB
I
o
output current I
2
C-bus mode; IB5[D7] = 0; AC
load bit set; peak current
IB4[D1]=1 500--mA
IB4[D1]=0 275--mA
I
2
C-bus mode; IB5[D7] = 0; AC
load bit not set; peak current
IB4[D1] = 1 - - 250 mA
IB4[D1] = 0 - - 100 mA
Table 5. Characteristics
…continued
T
amb
=25
C; V
P
= 14.4 V; unless otherwise specified. Tested at T
amb
= 25
C; guaranteed for T
j
=
40
C to +150
C;
functionality is guaranteed for V
P
< 10 V unless otherwise specified.
Symbol Parameter Conditions Min Typ Max Unit
TDF8546_SDS All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product short data sheet Rev. 8 — 27 September 2013 12 of 21
NXP Semiconductors
TDF8546
I
2
C-bus controlled 4 45 W best efficiency amplifier
Amplifier
P
o
output power R
L
=4 ; V
P
= 14.4 V;
THD = 0.5 %
18 20 - W
R
L
=4 ; V
P
= 14.4 V;
THD = 10 %
23 25 - W
R
L
=2 ; V
P
= 14.4 V;
THD = 0.5 %
29 32 - W
R
L
=2 ; V
P
= 14.4 V;
THD = 10 %
40 44 - W
P
o(max)
maximum output power R
L
=4 ; V
P
= 14.4 V;
V
i
= 2 V RMS square wave
37 40 - W
R
L
=4 ; V
P
= 15.2 V;
V
i
= 2 V RMS square wave
41 45 - W
R
L
=2 ; V
P
= 14.4 V;
V
i
= 2 V RMS square wave
58 64 - W
THD total harmonic distortion P
o
= 1 W to 12 W; f
i
= 1 kHz;
R
L
=4 ; BTL mode
-0.010.1%
P
o
=1W; f
i
= 1 kHz; R
L
=4;
V
P
= 7 V; BTL and best efficiency
mode
-0.010.1%
P
o
=4W; f
i
= 1 kHz; R
L
=4 ;
best efficiency mode
-0.030.1%
P
o
= 1 W to 12 W; f
i
=20kHz;
R
L
=4 ; best efficiency mode
-0.30.4%
V
o
= 1 V (RMS) and 4 V (RMS),
f
i
= 1 kHz; line driver mode
-0.020.05%
P
o
= 1 W to 12 W; f
i
= 1 kHz;
R
L
=4 ; low gain mode
-0.010.1%
cs
channel separation best efficiency mode; R
S
= 1 k;
R
ACGND
=250
[4]
f
i
=1kHz 65 80 - dB
f
i
= 10 kHz 55 65 - dB
SVRR supply voltage ripple rejection f
i
= 1 kHz; R
S
=1k;
R
ACGND
=250; best efficiency
mode; tested at V
P
= 10.5 V
[4]
55 70 - dB
CMRR common mode rejection ratio amplifier mode; V
cm
= 0.3 V (p-p);
f
i
= 1 kHz to 3 kHz, R
S
= 1 k;
R
ACGND
=250; best efficiency
mode
[4]
common mode input to
differential output (V
O(dif)
/
V
I(cm)
+ 26 dB)
55 65 - dB
common mode input to
common mode output (V
O(cm)
/
V
I(cm)
+ 26 dB)
50 58 - dB
Table 5. Characteristics
…continued
T
amb
=25
C; V
P
= 14.4 V; unless otherwise specified. Tested at T
amb
= 25
C; guaranteed for T
j
=
40
C to +150
C;
functionality is guaranteed for V
P
< 10 V unless otherwise specified.
Symbol Parameter Conditions Min Typ Max Unit
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21

TLV2474CD

Mfr. #:
Buy TLV2474CD
Manufacturer:
Texas Instruments
Description:
Precision Amplifiers Quad Rail-Rail
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

Products related to this Datasheet