PS8551L4 Chapter Title
R08DS0039EJ0200 Rev.2.00 Page 4 of 17
Sep 06, 2011
ABSOLUTE MAXIMUM RATINGS (TA = 25°C, unless otherwise specified)
Parameter Symbol Ratings Unit
Operating Ambient Temperature TA
40 to 85
°C
Storage Temperature Tstg
55 to125
°C
Supply Voltage VDD1, VDD2 0 to 5.5 V
Input Voltage VIN+, VIN
2 to V
DD10.5
V
2 Seconds Transient Input Voltage VIN+, VIN
6 to V
DD10.5
V
Output Voltage VOUT+, VOUT
0.5 to V
DD20.5
V
Isolation Voltage
*1
BV 5 000 Vr.m.s.
*1 AC voltage for 1 minute at TA = 25°C, RH = 60% between input and output.
Pins 1-4 shorted together, 5-8 shorted together.
RECOMMENDED OPERATING CONDITIONS
Parameter Symbol MIN. MAX. Unit
Operating Ambient Temperature TA 40 85 °C
Supply Voltage VDD1, VDD2 4.5 5.5 V
Input Voltage
(Accurate and Linear)
*1
V
IN+, VIN 200 200 mV
*1 Using V
IN = 0 V (to be connected to GND1) is recommended. Avoid using VIN of 2.5 V or more, because the
internal test mode is activated when the voltage VIN reaches more than 2.5 V.
PS8551L4 Chapter Title
R08DS0039EJ0200 Rev.2.00 Page 5 of 17
Sep 06, 2011
ELECTRICAL CHARACTERISTICS (DC Characteristics)
(TYP.: T
A = 25°C, VIN+ = VIN = 0 V, VDD1 = VDD2 = 5 V,
MIN., MAX.: refer to RECOMMENDED OPERATING CONDITIONS, unless otherwise specified)
Parameter Symbol Conditions MIN. TYP. MAX. Unit
Input Offset Voltage Vos TA = 25°C 2 0.3 2 mV
3 3
Input Offset Voltage Drift
vs. Temperature
dVos/dTA TA = 25 to +85°C 3 10
μ
V/°C
Gain
*1
G 200 mV VIN+ 200 mV,
T
A = 25°C
7.76 8 8.24 V/V
Gain Drift vs. Temperature dG/dTA 0.00087 V/V°C
VOUT Non-linearity (200 mV)
*2
NL200 200 mV VIN+ 200 mV 0.021 0.35 %
VOUT Non-linearity (200 mV) Drift
vs. Temperature
dNL200/dTA
0.0002 %/°C
VOUT Non-linearity (100 mV)
*2
NL100 100 mV VIN+ 100 mV 0.014 0.2 %
Maximum Input Voltage before VOUT
Clipping
VIN+MAX. 308 mV
Input Supply Current IDD1 VIN+ = 400 mV 16 20 mA
Output Supply Current IDD2 VIN+ = 400 mV 10 16 mA
Input Bias Current IIN+ VIN+ = 0V 0.5 5
μ
A
Input Bias Current Drift
vs. Temperature
dIIN+/dTA 0.45 nA/°C
Low Level Saturated Output Voltage VOL VIN+ = 400 mV 1.29 V
High Level Saturated Output Voltage VOH VIN+ = 400 mV 3.8 V
Output Voltage (VIN+ = VIN = 0 V) VOCM VIN+ = VIN = 0 V 2.2 2.55 2.8 V
Output Short-circuit Current IOSC 18.6 mA
Equivalent Input Resistance RIN 320 kΩ
VOUT Output Resistance ROUT 15
Ω
Input DC Common-Mode Rejection
Ratio
*3
CMRR
IN 76 dB
*1 The differential output voltage (V
OUT+ VOUT) with respect to the differential input voltage (VIN+ VIN), where VIN+ =
200 mV to 200 mV and V
IN = 0 V) is measured under the circuit shown in Fig. 2 NL200, G Test Circuit. Upon
the resulting chart, the gain is defined as the slope of the optimum line obtained by using the method of least
squares.
*2 The differential output voltage (V
OUT+ VOUT) with respect to the differential input voltage (VIN+ VIN) is measured
under the circuit shown in Fig. 2 NL200, G Test Circuit. Upon the resulting chart, the optimum line is obtained by
using the method of least squares. Non-linearity is defined as the ratio (%) of the optimum line obtained by dividing
[Half of the peak to peak value of the (residual) deviation] by [full-scale differential output voltage].
For example, if the differential output voltage is 3.2 V, and the peak to peak value of the (residual) deviation is 22.4
mV, while the input V
IN+ is ±200 mV, the output non-linearity is obtained as follows:
NL200 = 22.4/(2 × 3 200) = 0.35%
*3 CMRR
IN is defined as the ratio of the differential signal gain (when the differential signal is applied between the
input pins) to the common-mode signal gain (when both input pins are connected and the signal is applied). This
value is indicated in dB.
<R>
PS8551L4 Chapter Title
R08DS0039EJ0200 Rev.2.00 Page 6 of 17
Sep 06, 2011
ELECTRICAL CHARACTERISTICS (AC Characteristics)
(TYP.: T
A = 25°C, VIN+ = VIN = 0 V, VDD1 = VDD2 = 5 V,
MIN., MAX.: refer to RECOMMENDED OPERATING CONDITIONS, unless otherwise specified)
Parameter Symbol Conditions MIN. TYP. MAX. Unit
VOUT Bandwidth (3 dB) fC VIN+ = 200 mVp-p, sine wave 50 100 kHz
VOUT Noise NOUT VIN+ = 0 V 31.5 mVr.m.s.
VIN to VOUT Signal Delay (50 to 10%) tPD10 VIN+ = 0 to 150 mV step 2.03 3.3
μ
s
VIN to VOUT Signal Delay (50 to 50%) tPD50 4.01 5.6
VIN to VOUT Signal Delay (50 to 90%) tPD90 6.02 9.9
VOUT Rise Time/Fall Time (10 to 90%) tr/tf VIN+ = 0 to 150 mV step 3.53 6.6
μ
s
Common Mode Transient Immunity
*1
CMTI VCM = 0.5 kV, TA = 25°C 10 25 kV/
μ
s
Power Supply Noise Rejection
*2
PSR f = 1 MHz 100 mVr.m.s.
*1 CMTI is tested by applying a pulse that rises and falls suddenly (V
CM = 0.5 kV) between GND1 on the input side
and GND2 on the output side (pins 4 and 5) by using the circuit shown in Fig. 9 CMTI Test Circuit. CMTI is
defined at the point where the differential output voltage (V
OUT+ VOUT) fluctuates 200 mV (>1
μ
s) or more from the
average output voltage.
*2 This is the value of the transient voltage at the differential output when 1 V
p-p, 1 MHz, and 40 ns rise/fall time
square wave is applied to both V
DD1 and VDD2.

PS8551L4-E3-AX

Mfr. #:
Manufacturer:
Renesas Electronics
Description:
Optically Isolated Amplifiers Hi-Spd Optocplr 8-pin DIP
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