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74FCT573CTSOG

P1-P3P4-P6P7-P7
MILITARY AND INDUSTRIAL TEMPERATURE RANGES
IDT54/74FCT573T/AT/CT
FAST CMOS OCTAL TRANSPARENT LATCH
1
NOVEMBER 2016MILITARY AND INDUSTRIAL TEMPERATURE RANGES
IDT and the IDT logo are registered trademarks of Integrated Device Technology, Inc.
© 2016 Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice. DSC-5948/8
FEATURES:
• Std., A, and C grades
• Low input and output leakage
≤≤
≤≤
≤1µA (max.)
• CMOS power levels
• True TTL input and output compatibility:
–VOH = 3.3V (typ.)
–VOL = 0.3V (typ.)
• High Drive outputs (-15mA IOH, 48mA IOL)
• Meets or exceeds JEDEC standard 18 specifications
• Military product compliant to MIL-STD-883, Class B and DESC
listed (dual marked)
• Power off disable outputs permit "live insertion"
• Available in the following packages:
– Industrial: SOIC, QSOP
– Military: CERDIP, LCC
FUNCTIONAL BLOCK DIAGRAM
IDT54/74FCT573T/AT/CT
FAST CMOS OCTAL
TRANSPARENT LATCH
DESCRIPTION:
The FCT573Tis an octal transparent latch built using an advanced dual
metal CMOS technology. These octal latches have 3-state outputs and are
intended for bus oriented applications. The flip-flops appear transparent to
the data when Latch Enable (LE) is high. When LE is low, the data that meets
the set-up time is latched. Data appears on the bus when the Output Enable
(OE) is low. When OE is high, the bus output is in the high-impedance state.
LE
D
G
O
O
0
D
0
D
G
O
O
1
D
1
D
G
O
O
2
D
2
D
G
O
O
3
D
3
D
G
O
O
4
D
4
D
G
O
O
5
D
5
D
G
O
O
6
D
6
D
G
O
O
7
D
7
OE
MILITARY AND INDUSTRIAL TEMPERATURE RANGES
2
IDT54/74FCT573T/AT/CT
FAST CMOS OCTAL TRANSPARENT LATCH
PIN CONFIGURATION
Symbol Description Max Unit
VTERM
(2)
Terminal Voltage with Respect to GND –0.5 to +7 V
VTERM
(3)
Terminal Voltage with Respect to GND –0.5 to VCC+0.5 V
TSTG Storage Temperature –65 to +150 °C
I
OUT DC Output Current –60 to +120 mA
ABSOLUTE MAXIMUM RATINGS
(1)
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability. No terminal voltage may exceed
Vcc by +0.5V unless otherwise noted.
2. Inputs and Vcc terminals only.
3. Output and I/O terminals only.
Symbol Parameter
(1)
Conditions Typ. Max. Unit
CIN Input Capacitance VIN = 0V 6 10 pF
C
OUT Output Capacitance VOUT = 0V 8 12 pF
CAPACITANCE (TA = +25°C, F = 1.0MHz)
NOTE:
1. This parameter is measured at characterization but not tested.
PIN DESCRIPTION
Pin Names Description
D x Data Inputs
LE Latch Enable Input (Active HIGH)
OE Output Enable Input (Active LOW)
Ox 3-State Outputs
CERDIP/ SOIC/ QSOP
TOP VIEW
2
3
1
16
15
14
11
19
18
20
17
13
12
5
6
7
4
8
9
10
D
2
D
0
D
1
V
CC
D
3
D
6
D
4
D
5
D
7
GND
O
0
O
3
O
1
O
2
O
4
O
7
O
5
O
6
LE
OE
1
23
4
5
7
9
6
8
10 11 12 13
14
15
16
17
18
1920
O
3
O
1
O
2
O
4
O
5
D
1
D
0
D
7
GND
LE
O
7
O
6
OE
V
CC
O
0
INDEX
D
6
D
2
D
5
D
3
D
4
LCC
TOP VIEW
NOTE:
1. H = HIGH Voltage Level
X = Don’t Care
L = LOW Voltage Level
Z = High Impedance
FUNCTION TABLE
(1)
Inputs Outputs
Dx LE OE Ox
HH L H
LH L L
XX H Z
MILITARY AND INDUSTRIAL TEMPERATURE RANGES
IDT54/74FCT573T/AT/CT
FAST CMOS OCTAL TRANSPARENT LATCH
3
NOTES:
1. For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at VCC = 5.0V, +25°C ambient.
3. Not more than one output should be tested at one time. Duration of the test should not exceed one second.
4. The test limit for this parameter is ±5µA at TA = –55°C.
5. This parameter is guaranteed but not tested.
Symbol Parameter Test Conditions
(1)
Min. Typ.
(2)
Max. Unit
V
OH Output HIGH Voltage VCC = Min IOH = –6mA MIL 2.4 3.3 —
VIN = VIH or VIL IOH = –8mA IND V
IOH = –12mA MIL 2 3 —
IOH = –15mA IND
VOL Output LOW Voltage VCC = Min IOL = 32mA MIL — 0.3 0.5 V
VIN = VIH or VIL IOL = 48mA IND
IOS Short Circuit Current VCC = Max., VO = GND
(3)
–60 –120 –225 mA
IOFF Input/Output Power Off Leakage
(5)
VCC = 0V, VIN or VO
≤≤
≤≤
≤
4.5V — — ±1µA
OUTPUT DRIVE CHARACTERISTICS
Symbol Parameter Test Conditions
(1)
Min. Typ.
(2)
Max. Unit
VIH Input HIGH Level Guaranteed Logic HIGH Level 2 — — V
VIL Input LOW Level Guaranteed Logic LOW Level — — 0.8 V
IIH Input HIGH Current
(4)
VCC = Max. VI = 2.7V — — ±1µA
IIL Input LOW Current
(4)
VCC = Max. VI = 0.5V — — ±1µA
IOZH High Impedance Output Current VCC = Max VO = 2.7V — — ±1µA
IOZL (3-State output pins)
(4)
VO = 0.5V — — ±1
II Input HIGH Current
(4)
VCC = Max., VI = VCC (Max.) — — ±1µA
VIK Clamp Diode Voltage VCC = Min, IIN = -18mA — –0.7 –1.2 V
VH Input Hysteresis — — 200 — mV
I
CC Quiescent Power Supply Current VCC = Max., VIN = GND or VCC — 0.01 1 mA
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified:
Industrial: TA = –40°C to +85°C, VCC = 5.0V ±5%; Military: TA = –55°C to +125°C, VCC = 5.0V ±10%
P1-P3P4-P6P7-P7

74FCT573CTSOG

Mfr. #:
Buy 74FCT573CTSOG
Manufacturer:
IDT
Description:
Latches Octal Transparent Latch
Lifecycle:
New from this manufacturer.
Delivery:
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