ADSP-2183
–22– REV. C
Parameter Min Max Unit
IDMA Read, Long Read Cycle
Timing Requirements:
t
IKR
IACK Low before Start of Read
1
0ns
t
IRP
Duration of Read 15 ns
Switching Characteristics:
t
IKHR
IACK High after Start of Read
1
15 ns
t
IKDS
IAD15–0 Data Setup before IACK Low 0.5t
CK
– 7 ns
t
IKDH
IAD15–0 Data Hold after End of Read
2
0ns
t
IKDD
IAD15–0 Data Disabled after End of Read
2
10 ns
t
IRDE
IAD15–0 Previous Data Enabled after Start of Read 0 ns
t
IRDV
IAD15–0 Previous Data Valid after Start of Read 15 ns
t
IRDH1
IAD15–0 Previous Data Hold after Start of Read (DM/PM1)
3
2t
CK
– 5 ns
t
IRDH2
IAD15–0 Previous Data Hold after Start of Read (PM2)
4
t
CK
– 5 ns
NOTES
1
Start of Read = IS Low and IRD Low.
2
End of Read = IS High or IRD High.
3
DM read or first half of PM read.
4
Second half of PM read.
t
IRP
t
IKR
PREVIOUS
DATA
READ
DATA
t
IKHR
t
IKDS
t
IRDV
t
IRDH
t
IKDD
t
IRDE
t
IKDH
IAD150
IACK
IS
IRD
Figure 17. IDMA Read, Long Read Cycle
ADSP-2183
–23–
REV. C
Parameter Min Max Unit
IDMA Read, Short Read Cycle
Timing Requirements:
t
IKR
IACK Low before Start of Read
1
0ns
t
IRP
Duration of Read 15 ns
Switching Characteristics:
t
IKHR
IACK High after Start of Read
1
15 ns
t
IKDH
IAD15–0 Data Hold after End of Read
2
0ns
t
IKDD
IAD15–0 Data Disabled after End of Read
2
10 ns
t
IRDE
IAD15–0 Previous Data Enabled after Start of Read 0 ns
t
IRDV
IAD15–0 Previous Data Valid after Start of Read 15 ns
NOTES
1
Start of Read = IS Low and IRD Low.
2
End of Read = IS High or IRD High.
t
IRP
t
IKR
PREVIOUS
DATA
t
IKHR
t
IRDV
t
IKDD
t
IRDE
t
IKDH
IAD150
IACK
IS
IRD
Figure 18. IDMA Read, Short Read Cycle
ADSP-2183
–24– REV. C
OUTPUT DRIVE CURRENTS
Figure 19 shows typical I-V characteristics for the output drivers
of the ADSP-2183. The curves represent the current drive
capability of the output drivers as a function of output voltage.
SOURCE VOLTAGE V
100
75
150
0 5.25
SOURCE CURRENT mA
0.75 1.50 2.25 3.00 3.75 4.50
75
50
100
125
25
25
50
0
175
200
3.0V, +85
°
C
3.3V, +25
°
C
3.6V, 40
°
C
3.0V, +85
°
C
3.3V, +25
°
C
3.6V, 40
°
C
Figure 19. Typical Drive Currents
NOTES:
1. REFLECTS ADSP-2183 OPERATION IN LOWEST POWER MODE.
(SEE "SYSTEM INTERFACE" CHAPTER OF THE ADSP-2100 FAMILY
USER'S MANUAL FOR DETAILS.)
2. CURRENT REFLECTS DEVICE OPERATING WITH NO INPUT LOADS.
V
DD
= 3.6V
V
DD
= 3.3V
V
DD
= 3.0V
TEMPERATURE °C
CURRENT (LOG SCALE) A
1000
100
0
08525 55
10
Figure 20. Power-Down Supply Current (Typical)
POWER DISSIPATION
To determine total power dissipation in a specific application,
the following equation should be applied for each output:
C × V
DD
2
× f
C = load capacitance, f = output switching frequency.
Example:
In an application where external data memory is used and no
other outputs are active, power dissipation is calculated as
follows:
Assumptions:
External data memory is accessed every cycle with 50% of the
address pins switching.
External data memory writes occur every other cycle with
50% of the data pins switching.
Each address and data pin has a 10 pF total load at the pin.
The application operates at V
DD
= 3.3 V and t
CK
= 30.0 ns.
Total Power Dissipation = P
INT
+ (C × V
DD
2
× f )
P
INT
= internal power dissipation from Power vs. Frequency
graph (Figure 20).
(C × V
DD
2
× f ) is calculated for each output:
# of
Pins × C × V
DD
2
× f
Address, DMS 8 × 10 pF × 3.3
2
V × 33.3 MHz = 29.0 mW
Data Output, WR 9 × 10 pF × 3.3
2
V × 16.67 MHz = 16.3 mW
RD 1 × 10 pF × 3.3
2
V × 16.67 MHz = 1.8 mW
CLKOUT 1 × 10 pF × 3.3
2
V × 33.3 MHz = 3.6 mW
50.7 mW
Total power dissipation for this example is P
INT
+ 50.7 mW.
1/t
CK
MHz
220
160
115
28 5232 36 40 44 48
205
175
145
130
190
100
85
70
2183 POWER, INTERNAL
1, 3, 4
V
DD
= 3.6V
V
DD
= 3.3V
V
DD
= 3.0V
184mW
150mW
120mW
110mW
90mW
72mW
1/t
CK
MHz
50
25
10
28
5232
36 40 44 48
45
30
20
15
40
35
5
0
POWER, IDLE
1, 2, 3
V
DD
= 3.6V
V
DD
= 3.3V
V
DD
= 3.0V
38mW
30mW
24mW
27mW
20mW
15mW
1/t
CK
MHz
32
22
16
4428 32 36 40
30
24
20
18
28
26
14
12
10
8
POWER, IDLE n MODES
3
48 52
IDLE
IDLE (16)
IDLE (128)
30mW
13.8mW
13mW
20mW
11mW
10.6mW
VALID FOR ALL TEMPERATURE GRADES.
1
POWER REFLECTS DEVICE OPERATING WITH NO OUTPUT LOADS.
2
IDLE REFERS TO ADSP-2183 STATE OF OPERATION DURING EXECUTION OF IDLE
INSTRUCTION. DEASSERTED PINS ARE DRIVEN TO EITHER V
DD
OR GND.
3
TYPICAL POWER DISSIPATION AT 3.3V V
DD
AND 25C EXCEPT WHERE SPECIFIED.
4
I
DD
MEASUREMENT TAKEN WITH ALL INSTRUCTIONS EXECUTING FROM INTERNAL
MEMORY. 50% OF THE INSTRUCTIONS ARE MULTIFUNCTION (TYPES 1,4,5,12,13,14),
30% ARE TYPE 2 AND TYPE 6, AND 20% ARE IDLE INSTRUCTIONS.
Figure 21. Power vs. Frequency

ADSP-2183KCA-210

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Digital Signal Processors & Controllers - DSP, DSC 16B 52 MIPS 3.3V 2 Serial Prts Host Prt
Lifecycle:
New from this manufacturer.
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