© 2007 Microchip Technology Inc. DS21615C-page 7
TCM811/TCM812
4.0 APPLICATIONS INFORMATION
The TCM811/TCM812 provides accurate V
DD
monitoring and reset timing during power-up, power-
down, and brownout/sag conditions. These devices
also reject negative-going transients (glitches) on the
power supply line. Figure 4-1 shows the maximum
transient duration vs. maximum negative excursion
(overdrive) for glitch rejection. Any combination of
duration and overdrive that is under the curve will not
generate a reset signal. Combinations above the curve
are detected as a brownout or power-down. Transient
immunity can be improved by adding a 0.1 µF capacitor
in close proximity to the V
DD
pin of the TCM811/
TCM812.
FIGURE 4-1: Maximum Transient Duration
vs. Overdrive for Glitch Rejection at +25°C.
4.1 RESET Signal Integrity During
Power-Down
The TCM811 RESET push-pull output is valid to
V
DD
= 1.0V. Below this voltage the output becomes an
"open circuit" and does not sink current. This means
CMOS logic inputs to the microcontroller will be floating
at an undetermined voltage. Most digital systems are
completely shutdown well above this voltage. How-
ever, in situations where RESET
must be maintained
valid to V
DD
= 0V, a pull-down resistor must be con-
nected from RESET
to ground to discharge stray
capacitances and hold the output low (Figure 4-2). This
resistor value, though not critical, should be chosen
such that it does not appreciably load RESET
under
normal operation (100 kΩ will be suitable for most
applications). Similarly, a pull-up resistor to V
DD
is
required for the TCM812 to ensure a valid high RESET
for V
DD
below 1.1V.
FIGURE 4-2: The addition of R
1
at the
RESET
output of the TCM811 ensures that the
RESET
output is valid to V
DD
= 0V.
4.2 Controllers and Processors With
Bidirectional I/O Pins
Some microcontrollers have bidirectional reset pins.
Depending on the current drive capability of the
controller pin, an indeterminate logic level may result if
there is a logic conflict. This can be avoided by adding
a 4.7 kΩ resistor in series with the output of the
TCM811/TCM812 (Figure 4-3). If there are other
components in the system which require a reset signal,
they should be buffered so as not to load the reset line.
If the other components are required to follow the reset
I/O of the microcontroller, the buffer should be
connected as shown with the solid line.
FIGURE 4-3: Interfacing the TCM811 to a
Bidirectional Reset I/O.
RESET COMPARATOR OVERDRIVE,
V
TH
- V
DD
(mV)
400
240
160
320
80
0
1
10
100
1000
MAXIMUM TRANSIENT DURATION (µsec)
T
A
= +25˚C
V
TH
Duration
Overdrive =
V
D D
V
DD
TCM81xL/M
TCM81xR/S/T
TCM811
V
DD
V
DD
R
1
100 kΩ
RESET
GND
4
2
0.1µF
1
TCM811
V
DD
RESET
GND
RESET
GND
Buffered RESET
To Other System
Components
BUFFER
Micro
4.7 kΩ
controller
0.1µF
4
2
1
