LTC5548
17
5548f
For more information www.linear.com/LTC5548
applicaTions inForMaTion
The complete test circuit, shown in Figure 9, uses resistive
impedance matching attenuators (L-pads) on an evaluation
board to transform each 25Ω IF output to 50Ω. An exter
-
nal 0°/180° power combiner is then used to convert the
100Ω differential output to 50Ω single-ended to facilitate
measurement. The measured performance is shown in
Figure 10. The measured results do not include the loss
of the L-pads and external 180° combiner.
Enable Interface
Figure 11 shows a simplified schematic of the EN pin
interface. To enable the chip, the EN voltage must be
higher than 1.2V. The voltage at the EN pin should never
exceed V
CC
by more than 0.3V. If this should occur, the
supply current could be sourced through the ESD diode,
potentially damaging the IC. If the EN pin is left floating,
its voltage will be pulled low by the internal pull-down
resistor and the chip will be disabled.
X2 Interface
Figure 12 shows a simplified schematic of the X2 pin
interface. To enable the integrated LO frequency doubler,
the X2 voltage must be higher than 1.2V. The X2 voltage
at the pin should never exceed V
CC
by more than 0.3V. If
this should occur, the supply current could be sourced
through the ESD diode, potentially damaging the IC. If the
X2
pin is left floating, its voltage will be pulled low by the
internal pull-down resistor and the LO frequency doubler
will be disabled.
Supply Voltage Ramping
Fast ramping of the supply voltage can cause a current
glitch in the internal ESD protection circuits. Depending on
the supply inductance, this could result in a supply volt
-
age transient
that exceeds the maximum rating. A supply
voltage ramp time of greater than 1ms is recommended.
Figure 10. Conversion Gain and IIP3 for Differential
IF Frequency of 10kHz to 20MHz
IF FREQUENCY (kHz)
0
CONVERSION LOSS (dB), IIP3 (dBm)
7
20000
5548 F10
5
4000 8000 12000 16000
25
11
15
9
13
23
CONVERSION LOSS
IIP3
RF = 5.8GHz
LS LO
Figure 11. Simplified Enable Input Circuit Figure 12. Simplified X2 Interface Circuit
LTC5548
EN
5548 F11
7
V
CC
9
BIAS
LTC5548
X2
5548 F12
8
V
CC
9