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74LVTH543WMX

P1-P3P4-P6P7-P7
© 2000 Fairchild Semiconductor Corporation DS012448 www.fairchildsemi.com
April 2000
Revised November 2000
74LVTH543 Low Voltage Octal Registered Transceiver with 3-STATE Outputs
74LVTH543
Low Voltage Octal Registered Transceiver
with 3-STATE Outputs
General Description
The LVTH543 octal transceiver contains two sets of D-type
latches for temporary storage of data flowing in either
direction. Separate Latch Enable and Output Enable inputs
are provided for each register to permit independent con-
trol of inputting and outputting in either direction of data
flow.
The LVTH543 data inputs include bushold, eliminating the
need for external pull-up resistors to hold unused inputs.
This octal registered transceiver is designed for low-volt-
age (3.3V) V
CC
applications, but with the capability to pro-
vide a TTL interface to a 5V environment. The LVTH543 is
fabricated with an advanced BiCMOS technology to
achieve high speed operation similar to 5V ABT while
maintaining a low power dissipation.
Features
■ Input and output interface capability to systems at
5V V
CC
■ Bushold data inputs eliminate the need for external
pull-up resistors to hold unused inputs
■ Live insertion/extraction permitted
■ Power Up/Down high impedance provides glitch-free
bus loading
■ Outputs source/sink
−32 mA/+64 mA
■ Functionally compatible with the 74 series 543
■ Latch-up performance exceeds 500 mA
■ ESD performance:
Human-body model
> 2000V
Machine model
> 200V
Charged-device model
> 1000V
Ordering Code:
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Connection Diagram Pin Descriptions
Order Number Package Number Package Description
74LVTH543WM M24B 24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
74LVTH543MTC MTC24 24-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Pin Names Description
OEAB
, OEBA Output Enable Inputs
LEAB
, LEBA Latch Enable Inputs
CEAB
, CEBA Chip Enable Inputs
A
0
–A
7
Side A Inputs or
3-STATE Outputs
B
0
–B
7
Side B Inputs or
3-STATE Outputs
www.fairchildsemi.com 2
74LVTH543
Logic Symbols
IEEE/IEC
Functional Description
The LVTH543 contains two sets of D-type latches, with
separate input and output controls for each. For data flow
from A to B, for example, the A to B Enable (CEAB
) input
must be LOW in order to enter data from the A Port or take
data from the B Port as indicated in the Data I/O Control
Table. With CEAB
LOW, a low signal on (LEAB) input
makes the A to B latches transparent; a subsequent
LOW-to-HIGH transition of the LEAB
line puts the A latches
in the storage mode and their outputs no longer change
with the A inputs. With CEAB
and OEAB both LOW, the B
output buffers are active and reflect the data present on the
output of the A latches. Control of data flow from B to A is
similar, but using the CEBA
, LEBA and OEBA.
Data I/O Control Table
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
Note: A-to-B data flow shown; B-to-A flow control is the same, except
using CEBA
, LEBA, and OEBA.
Logic Diagram
Please not that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
Inputs
Latch Status
Output
CEAB
LEAB OEAB Buffers
H X X Latched High Z
X H X Latched —
L L X Transparent —
XXH — High Z
LXL — Driving
3 www.fairchildsemi.com
74LVTH543
Absolute Maximum Ratings(Note 1)
Recommended Operating Conditions
Note 1: Absolute Maximum continuous ratings are those values beyond which damage to the device may occur. Exposure to these conditions or conditions
beyond those indicated may adversely affect device reliability. Functional operation under absolute maximum rated conditions is not implied.
Note 2: I
O
Absolute Maximum Rating must be observed.
Symbol Parameter Value Conditions Units
V
CC
Supply Voltage −0.5 to +4.6 V
V
I
DC Input Voltage −0.5 to +7.0 V
V
O
DC Output Voltage −0.5 to +7.0 Output in 3-STATE V
−0.5 to +7.0 Output in HIGH or LOW State (Note 2) V
I
IK
DC Input Diode Current −50 V
I
< GND mA
I
OK
DC Output Diode Current −50 V
O
< GND mA
I
O
DC Output Current 64 V
O
> V
CC
Output at HIGH State
mA
128 V
O
> V
CC
Output at LOW State
I
CC
DC Supply Current per Supply Pin ±64 mA
I
GND
DC Ground Current per Ground Pin ±128 mA
T
STG
Storage Temperature −65 to +150 °C
Symbol Parameter Min Max Units
V
CC
Supply Voltage 2.7 3.6 V
V
I
Input Voltage 0 5.5 V
I
OH
HIGH Level Output Current −32
mA
I
OL
LOW Level Output Current 64
T
A
Free-Air Operating Temperature −40 85 °C
∆t/∆V Input Edge Rate, V
IN
= 0.8V–2.0V, V
CC
= 3.0V 0 10 ns/V
P1-P3P4-P6P7-P7

74LVTH543WMX

Mfr. #:
Buy 74LVTH543WMX
Manufacturer:
ON Semiconductor
Description:
IC TXRX NON-INVERT 3.6V 24SOIC
Lifecycle:
New from this manufacturer.
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