VS-FB190SA10

VS-FB190SA10
www.vishay.com
Vishay Semiconductors
Revision: 01-Jun-16
4
Document Number: 93459
For technical questions within your region: DiodesAmericas@vishay.com
, DiodesAsia@vishay.com, DiodesEurope@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Fig. 7 - Typical Source Drain Diode Forward Voltage
Fig. 8 - Maximum Safe Operating Area
Fig. 9 - Maximum Drain Current vs.
Case Temperature
Fig. 10a - Switching Time Test Circuit
Fig. 10b - Switching Time Waveforms
0.1
1
10
100
1000
0.2 0.6 1.0 1.4 1.8
V ,Source-to-Drain Voltage (V)
I , Reverse Drain Current (A)
SD
SD
V = 0 V
GS
T = 150 C
J
°
T = 25 C
J
°
1
10
100
1000
10000
1 10 100 1000
OPERATION IN THIS AREA LIMITED
BY R
DS(on)
Single Pulse
T
T
= 150 C
= 25 C
°
°
J
C
V , Drain-to-Source Voltage (V)
I , Drain Current (A)I , Drain Current (A)
DS
D
10us
100us
1ms
10ms
0 255075100 150125 175 200
25
50
75
100
125
150
175
Allowable Case Temperature (°C)
I , Drain Current in DC (A)
D
DC
Pulse width 1 µs
Duty factor 0.1 %
D.U.T.
10 V
+
-
V
DS
R
D
V
DD
R
G
V
GS
V
DS
90%
10%
V
GS
t
d(on)
t
r
t
d(off)
t
f
VS-FB190SA10
www.vishay.com
Vishay Semiconductors
Revision: 01-Jun-16
5
Document Number: 93459
For technical questions within your region: DiodesAmericas@vishay.com
, DiodesAsia@vishay.com, DiodesEurope@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction to Case
Fig. 12a - Unclamped Inductive Test Circuit
Fig. 12b - Unclamped Inductive Waveforms
Fig. 12c - Maximum Avalanche Energy vs. Drain Current
Fig. 13a - Basic Gate Charge Waveform
0.01
0.1
1
0.0001 0.001 0.01 0.1 101
t , Rectangular Pulse Duration (s)
Z
thJC
- Thermal Impedance (°C/W)
1
Single pulse
(thermal resistance)
0.1
0.2
0.3
0.5
DC
0.75
0.01 Ω
D.U.T
L
+
-
Driver
A
15 V
20 V
R
G
V
DS
I
AS
t
p
V
DD
25 50 75 100 125 150
0
300
600
900
1200
1500
Starting T , Junction Temperature( C)
E , Single Pulse Avalanche Energy (mJ)
J
AS
°
I
D
TOP
BOTTOM
71A
100A
160A
Q
G
Q
GS
Q
GD
V
G
Charge
10 V
VS-FB190SA10
www.vishay.com
Vishay Semiconductors
Revision: 01-Jun-16
6
Document Number: 93459
For technical questions within your region: DiodesAmericas@vishay.com
, DiodesAsia@vishay.com, DiodesEurope@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Fig. 13b - Gate Charge Test Circuit
Fig. 13c - Peak Diode Recovery dV/dt Test Circuit
Fig. 14 - For N-Channel Power MOSFETs
D.U.T.
V
DS
I
D
I
G
3 mA
V
GS
0.3 µF
50 kΩ
0.2 µF
12 V
Current regulator
Same type as D.U.T.
Current sampling resistors
+
-
+
-
+
+
+
-
-
-
dV/dt controlled by R
G
Driver same type as D.U.T.
I
SD
controlled by duty factor "D"
D.U.T. - Device under test
D.U.T.
Circuit layout considerations
Low stray inductance
Ground plane
Low leakage inductance
current transformer
1
2
4
3
R
G
V
DD
P.W.
Period
di/dt
Diode Recovery
dv/dt
Ripple 5%
Body Diode Forward Drop
Re-Applied
Voltage
Reverse
Recovery
Current
Body Diode Forward
Current
V
GS
=10V
V
DD
I
SD
Driver Gate Drive
D.U.T. I
SD
Waveform
D.U.T. V
DS
Waveform
Inductor Curent
D =
P. W .
Period
* V
GS
= 5V for Logic Level Devices
*

VS-FB190SA10

Mfr. #:
Manufacturer:
Vishay / Siliconix
Description:
MOSFET 190 Amp 100 Volt
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

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