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MAX3140EEI

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36
MAX3140
SPI/MICROWIRE-Compatible UART with Integrated
True Fail-Safe RS-485/RS-422 Transceivers
______________________________________________________________________________________ 13
R
R
Y
Z
V
OD
V
OC
Figure 1. Driver DC Test Load
RECEIVER
OUTPUT
TEST POINT
1k
1k
S1
S2
V
CC
C
L
15pF
Figure 2. Receiver Enable/Disable Timing Test Load
DI
DE
V
CC
Y
Z
C
L1
C
L2
R
DIFF
V
ID
Figure 3. Driver Timing Test Circuit
OUTPUT
UNDER TEST
500Ω
S1
S2
V
CC
C
L
Figure 4. Driver Enable/Disable Timing Test Load
DI
3V
0
Z
Y
V
O
0
-V
O
V
O
1.5V
t
PLH
1/2 V
O
10%
t
R
90%
90%
t
PHL
1.5V
1/2 V
O
10%
t
F
V
DIFF
= V (Y) - V (Z)
V
DIFF
t
SKEW = |
t
PLH
- t
PHL
|
Figure 5. Driver Propagation Delays
OUTPUT NORMALLY LOW
OUTPUT NORMALLY HIGH
3V
0
Y, Z
V
OL
Y, Z
0
1.5V 1.5V
V
OL
+0.5V
V
OH
-0.5V
2.3V
2.3V
t
ZL(SHDN)
, t
ZL
t
LZ
t
ZH(SHDN)
, t
ZH
t
HZ
DE
Figure 6. Driver Enable and Disable Times
MAX3140
SPI/MICROWIRE-Compatible UART with Integrated
True Fail-Safe RS-485/RS-422 Transceivers
14 ______________________________________________________________________________________
V
OH
V
OL
A
B
1V
-1V
1.5V 1.5V
OUTPUT
INPUT
RO
t
PLH
t
PHL
Figure 7. Receiver Propagation Delays
OUTPUT NORMALLY LOW
OUTPUT NORMALLY HIGH
3V
0
V
CC
RO
RO
0
1.5V 1.5V
V
OL
+ 0.5V
V
OH
- 0.5V
1.5V
1.5V
t
ZL(SHDN)
, t
ZL
t
LZ
t
ZH(SHDN)
, t
ZH
t
HZ
RE
Figure 8. Receiver Enable and Disable Times
R
B
RECEIVER
OUTPUT
ATE
A
V
ID
R
Figure 9. Receiver Propagation Delay Test Circuit
_______________Detailed Description
The MAX3140 combines an SPI/QSPI/MICROWIRE-
compatible UART (MAX3100) and an RS-485/RS-422
transceiver (MAX3089) in one package. The UART sup-
ports data rates up to 230k baud for both standard
UART bit streams as well as IrDA, and includes an
8-word receive FIFO. Also included is a parity-bit inter-
rupt useful in 9-bit address recognition.
The RS-485/RS-422 transceiver has a true fail-safe
receiver and allows up to 256 transceivers on the bus.
Other features include pin-selectable full/half-duplex
operation and a phase control to correct for twisted-
pair reversal. The slew rate of the RS-485/RS-422 trans-
ceiver is selectable, limiting the maximum data rate to
115kbps, 500kbps, or 10Mbps. The RS-485/RS-422 dri-
vers are output short-circuit current limited, and thermal
shutdown circuitry protects the RS-485/RS-422 drivers
against excessive power dissipation.
The UART and RS-485/RS422 functions can be used
together or independently since the two functions only
share supply and ground connections. This part oper-
ates from a single +5V supply.
UART
The universal asynchronous receiver transmitter
(UART) interfaces the SPI/MICROWIRE-compatible syn-
chronous serial data from a microprocessor (µP) to
asynchronous, serial-data communication ports (RS-
485, IrDA). Figure 10 shows the MAX3140 functional
diagram. Included in the UART function is an
SPI/MICROWIRE interface, a baud-rate generator, and
an interrupt generator.
SPI Interface
The MAX3140 is compatible with SPI, QSPI (CPOL = 0,
CPHA = 0), and MICROWIRE serial-interface standards
(Figure 11). The MAX3140 has a unique full-duplex
architecture that expects a 16-bit word for DIN and
simultaneously produces a 16-bit word for DOUT
regardless of which read/write register used. The DIN
stream is monitored for its first two bits to tell the UART
the type of data transfer being executed (see the
WRITE CONFIGURATION register, READ CONFIG-
URATION register, WRITE DATA register,
and
READ
DATA register
sections). DIN (MOSI) is latched on
MAX3140
SPI/MICROWIRE-Compatible UART with Integrated
True Fail-Safe RS-485/RS-422 Transceivers
______________________________________________________________________________________ 15
RO
TXP
A
B
Y
Z
GND
DIN
CS
SCLK
DOUT
CTS
RTS
I/O
TX
IRQ
RX
X2
X1
9
9
4
9
9
99
P
t
P
t
P
r
P
r
P
r
SPI
INTERFACE
INTERRUPT
LOGIC
BAUD-RATE
GENERATOR
TX BUFFER
TX SHIFT REGISTSER
RX SHIFT REGISTSER
RX FIFO
RX BUFFER
DI
SRL
DE
H/F
RE
NOTE: SWITCH POSITIONS INDICATE H/F = GND
RXP
9
MAX3140
Figure 10. Functional Diagram
CS
SCLK
SCLK
SCLK
SCLK
(CPOL = 0, CPHA = 0)
(CPOL = 0, CPHA = 1)
(CPOL = 1, CPHA = 0)
(CPOL = 1, CPHA = 1)
COMPATIBLE
WITH MAX3140
NOT COMPATIBLE
WITH MAX3140
DIN
MSB 1314 12 11 10 9 8 7 6 5 4 3 2 1 LSB
DOUT
MSB 1314 12 11 10 9 8 7 6 5 4 3 2 1 LSB
Figure 11. Compatible CPOL and CPHA Modes
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36

MAX3140EEI

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Buy MAX3140EEI
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Description:
IC UART SPI RS485/422 28-QSOP
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