MAX16054AZT+T

Detailed Description
Theory of Operation
The MAX16054 creates a push-on, push-off function
using a momentary-contact normally open SPST
switch. The high-to-low transition that occurs when
closing the switch causes OUT to go high and OUT to
go low. The output state remains latched after the
switch is released/opened. Closing the switch again
causes OUT to go low and OUT to go high.
Debounce circuitry eliminates the extraneous level
changes that result from interfacing with mechanical
switches (switch bounce). Virtually all mechanical
switches bounce upon opening and closing. The
bounce when a switch opens or closes is eliminated by
requiring that the sequentially clocked input remains in
the same state for a number of sampling periods. The
output does not change state from high-to-low or low-
to-high until the input is stable for at least 50ms (typ).
The
Functional Diagram
shows the functional blocks
consisting of an on-chip oscillator, counter, exclusive-
NOR gate, a D flip-flop, and a T (toggle) flip-flop. When
the pushbutton input does not equal the internal
debounced button state (the Q output of the D flip-
flop), the XNOR gate issues a counter reset. When the
switch input state is stable for the full qualification peri-
od, the counter clocks the D flip-flop, changing the
internal pushbutton state. The Q output of the D flip-flop
is connected to a toggle flip-flop that toggles when the
internal pushbutton state goes through a high-to-low
transition. Figure 1 shows the typical opening and clos-
ing switch debounce operation.
A rising pulse at CLEAR resets the T flip-flop and pulls
OUT low and OUT high.
MAX16054
On/Off Controller with Debounce and
±15kV ESD Protection
4 _______________________________________________________________________________________
Functional Diagram
XNOR
UNDERVOLTAGE
LOCKOUT
T
Q
CLR
COUNTER
D
Q
R
D
Q
CLR
OSC
V
CC
R
PU
R
IN
OUT
OUT
CLEAR
ESD
PROTECTION
V
CC
MAX16054
Undervoltage Lockout
The undervoltage-lockout circuitry ensures that the out-
puts are at the correct state on power-up. While V
CC
is
less than the 2.1V (typ) undervoltage threshold and
greater than 1.0V, OUT remains low and transitions at
IN are ignored.
Robust Switch Input
The switch input (IN) has overvoltage clamping diodes to
protect against damaging fault conditions. Switch input
voltages can safely swing ±25V to ground. Proprietary
ESD-protection structures protect against high ESD
encountered in harsh industrial environments, membrane
keypads, and portable applications. They are designed
to withstand ±15kV per the IEC 61000-4-2 Air-Gap
Discharge test and ±8kV per the IEC 61000-4-2 Contact-
Discharge test.
Since there is a 63kΩ (typ) pullup resistor connected to
IN, driving the input to -25V draws approximately 0.5mA
from the V
CC
supply. Driving the input to +25V causes
approximately 0.32mA of current to flow back into the
V
CC
supply. If the total system V
CC
supply current is
less than the current flowing back into the V
CC
supply,
V
CC
rises above normal levels. In some low-current sys-
tems, a zener diode on V
CC
may be required.
±15kV ESD Protection
ESD-protection structures are incorporated on all pins
to protect against electrostatic discharges encountered
during handling and assembly. The MAX16054 has
extra protection against static electricity to protect
against ESD of ±15kV at the switch input without dam-
age. The ESD structures withstand high ESD in all
states: normal operation, shutdown, and powered
down. A design advantage of the MAX16054 is that it
continues working without latchup after an ESD event,
which eliminates the need to power-cycle the device.
ESD protection can be tested in various ways; this
product is characterized for protection to the following
limits:
1) ±15kV using the Human Body Model.
2) ±8kV using the Contact-Discharge method specified
in IEC 61000-4-2.
3) ±15kV using the IEC 61000-4-2 Air-Gap method.
MAX16054
On/Off Controller with Debounce and
±15kV ESD Protection
_______________________________________________________________________________________ 5
V
CC
t
DP
t
DP
t
DP
t
DP
t
DP
t
CO
UVLO
IN
OUTPUT OF D
FLIP-FLOP
(INVERTED
IN AFTER
DEBOUNCE)
OUT
CLEAR
Figure 1. MAX16054 Timing Diagram
MAX16054
Human Body Model
Figure 2a shows the Human Body Model, and Figure
2b shows the current waveform it generates when dis-
charged into a low impedance. This model consists of a
100pF capacitor charged to the ESD voltage of interest,
which is then discharged into the test device through a
1.5kΩ resistor.
IEC 61000-4-2
The IEC 61000-4-2 standard covers ESD testing and
performance of finished equipment; it does not specifi-
cally refer to integrated circuits. The MAX16054 helps in
the design of equipment that meets IEC 61000-4-2, with-
out the need for additional ESD-protection components.
The major difference between tests done using the
Human Body Model and IEC 61000-4-2 is higher peak
current in IEC 61000-4-2, because series resistance is
lower in the IEC 61000-4-2 model. Hence, the ESD with-
stand voltage measured to IEC 61000-4-2 is generally
lower than that measured using the Human Body Model.
Figure 3a shows the IEC 61000-4-2 model, and Figure
3b shows the current waveform for the IEC 61000-4-2
ESD Contact-Discharge test.
The Air-Gap test involves approaching the device with a
charged probe. The Contact-Discharge method connects
the probe to the device before the probe is energized.
Machine Model
The Machine Model for ESD tests all pins using a
200pF storage capacitor and zero discharge resis-
tance. Its objective is to emulate the stress caused by
contact that occurs with handling and assembly during
manufacturing.
On/Off Controller with Debounce and
±15kV ESD Protection
6 _______________________________________________________________________________________
CHARGE-CURRENT
LIMIT RESISTOR
DISCHARGE
RESISTANCE
STORAGE
CAPACITOR
C
s
100pF
R
C
1MΩ
R
D
1500Ω
HIGH-
VOLTAGE
DC
SOURCE
DEVICE
UNDER
TEST
Figure 2a. Human Body ESD Test Model
CHARGE-CURRENT
LIMIT RESISTOR
DISCHARGE
RESISTANCE
STORAGE
CAPACITOR
C
s
150pF
R
C
50MΩ to 100MΩ
R
D
330Ω
HIGH-
VOLTAGE
DC
SOURCE
DEVICE
UNDER
TEST
Figure 2b. Human Body Current Waveform
I
P
100%
90%
36.8%
t
RL
TIME
t
DL
CURRENT WAVEFORM
PEAK-TO-PEAK RINGING
(NOT DRAWN TO SCALE)
I
r
10%
0
0
AMPERES
Figure 3a. IEC 61000-4-2 ESD Test Model
t
R
= 0.7ns TO 1ns
30ns
60ns
t
100%
90%
10%
I
PEAK
I
Figure 3b. IEC 61000-4-2 ESD Generator Current Waveform

MAX16054AZT+T

Mfr. #:
Manufacturer:
Maxim Integrated
Description:
Supervisory Circuits w/Debounce
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
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