REV.
a
ADM1485
5 V Low Power
EIA RS-485 Transceiver
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700 www.analog.com
Fax: © Analog Devices, Inc. All rights reserved.
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
FUNCTIONAL BLOCK DIAGRAM
8-Lead
ADM1485
R
D
RO
RE
DI
V
CC
B
A
GND
DE
FEATURES
Meets EIA RS-485 Standard
30 Mbps Data Rate
Single 5 V Supply
–7 V to +12 V Bus Common-Mode Range
High Speed, Low Power BiCMOS
Thermal Shutdown Protection
Short-Circuit Protection
Driver Propagation Delay: 10 ns
Receiver Propagation Delay: 15 ns
High-Z Outputs with Power Off
Superior Upgrade for LTC1485
APPLICATIONS
Low Power RS-485 Systems
DTE-DCE Interface
Packet Switching
Local Area Networks
Data Concentration
Data Multiplexers
Integrated Services Digital Network (ISDN)
GENERAL DESCRIPTION
The ADM1485 is a differential line transceiver suitable for high
speed bidirectional data communication on multipoint bus trans-
mission lines. It is designed for balanced data transmission and
complies with both RS-485 and RS-422 EIA Standards. The part
contains a differential line driver and a differential line receiver.
Both the driver and the receiver may be enabled independently.
When disabled, the outputs are three-stated.
The ADM1485 operates from a single 5 V power supply. Excessive
power dissipation caused by bus contention or by output shorting
is prevented by a thermal shutdown circuit. This feature forces
the driver output into a high impedance state if, during fault condi-
tions, a significant temperature increase is detected in the internal
driver circuitry.
Up to 32 transceivers may be connected simultaneously on a bus,
but only one driver should be enabled at any time. It is important,
therefore, that the remaining disabled drivers do not load the bus.
To ensure this, the ADM1485 driver features high output
impedance when disabled and also when powered down.
This minimizes the loading effect when the transceiver is not being
used. The high impedance driver output is maintained over the
entire common-mode voltage range from –7 V to +12 V.
The receiver contains a fail-safe feature that results in a logic
high output state if the inputs are unconnected (floating).
The ADM1485 is fabricated on BiCMOS, an advanced mixed
technology process combining low power CMOS with fast
switching bipolar technology. All inputs and outputs contain
protection against ESD; all driver outputs feature high source
and sink current capability. An epitaxial layer is used to guard
against latch-up.
The part is fully specified over the commercial and industrial
temperature range and is available in PDIP, SOIC, and small
MSOP packages.
2012781/461-3113
'
The ADM1485 features extremely fast switching speeds. Minimal
driver propagation delays permit transmission at typical data rates
of 30 Mbps while low skew minimizes EMI interference.
