74AC125, 74ACT125 — Quad Buffer with 3-STATE Outputs
©1988 Fairchild Semiconductor Corporation www.fairchildsemi.com
74AC125, 74ACT125 Rev. 1.4.1
January 2008
74AC125, 74ACT125
Quad Buffer with 3-STATE Outputs
Features
■
I
CC
reduced by 50%
■
Outputs source/sink 24mA
■
ACT125 has TTL-compatible outputs
General Description
The AC/ACT125 contains four independent non-inverting
buffers with 3-STATE outputs.
Ordering Information
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number.
All packages are lead free per JEDEC: J-STD-020B standard.
Connection Diagram
Pin Description
Logic Symbol
IEEE/IEC
Function Table
H
=
HIGH Voltage Level, L
=
LOW Voltage Level
Z
=
HIGH Impedance, X
=
Immaterial
Order
Number
Package
Number Package Description
74AC125SC M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
74AC125SJ M14D 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74AC125MTC MTC14 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
74AC125PC N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
74ACT125SC M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
74ACT125SJ M14D 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74ACT125MTC MTC14 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
74ACT125PC N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Pin Names Description
A
n
, B
n
Inputs
O
n
Outputs
Inputs Output
A
n
B
n
O
n
LL L
LH H
HX Z